Dhanyashree T S — Software Engineer
I am a Staff Engineer in Design Verification with 8 years of experience across NoC, IP, subsystem, and SoC levels. I began my career working on Network-on-Chip verification using AMBA protocols, before moving on to DisplayPort protocol verification at IP, subsystem, and SoC integration levels. I also have experience leading and mentoring a small team of engineers, and am skilled in SystemVerilog, UVM, and coverage-driven verification, with a focus on building robust and reliable environments.
Stackforce AI infers this person is a Design Verification Engineer with expertise in semiconductor and hardware verification.
Location: Bengaluru, Karnataka, India
Experience: 9 yrs 6 mos
Skills
- Universal Verification Methodology (uvm)
- Systemverilog
Career Highlights
- 8 years of experience in design verification
- Expert in SystemVerilog and UVM methodologies
- Proven leadership in mentoring engineering teams
Work Experience
MediaTek
Staff Engineer (4 yrs 7 mos)
Synapse Design Inc.
Project Engineer (3 yrs 8 mos)
Aceic Design Technologies
Project Engineer-ASIC Verification (2 mos)
Maven Silicon
Trainee (5 mos)
ISRO Satellite Centre
Project Trainee (10 mos)
Education
Master’s Degree at RNS Institute of Technology - India
B.E at Kalpataru Institute of Technology, TIPTUR
