Sarvesh Pandey

Engineering Manager

Bengaluru, Karnataka, India19 yrs 2 mos experience

Highly Stable

Key Highlights

Expert in SoC emulation and validation.
Strong background in SystemC and firmware development.
Proven leadership in engineering management roles.

Stackforce AI infers this person is a leader in semiconductor engineering with expertise in SoC and embedded systems.

Contact

Skills

Core Skills

SocEmulationSystemc

Other Skills

Emulation build creationSystem issue debuggingVSOC/Virtual Platform environmentCC++Data structureTLM 2.0SystemC ModelingVerificationPerlEmbedded SystemsFirmwareComputer ArchitectureI2CSimulations

About

Leading SoC emulation to enable pre and post silicon validation for all Client devices in Intel.. Specialties: •Emulation build creation, debug and it's flow. •System issue debugging. •VSOC/Virtual Platform environment. •C, C++, Data structure, SystemC, TLM 2.0 •Attended DOULOS training on C++, SystemC, TLM 2.0 •Slim core processor, ST's processors (ST20, ST40). •Assembly Language of SLIM, x86, ST-BUS, Computer Architecture. •Protocols: SPI, I2C, Internet Protocol Accelerator, UART •Instruction Set Simulator (ISS), FW design and Development.

Experience

19 yrs 2 mos

Total Experience

3 yrs 2 mos

Average Tenure

--

Current Experience

Intel corporation

2 roles

Engineering Manager

Jul 2018 – Jun 2023 · 4 yrs 11 mos

Emulation build creationSystem issue debuggingVSOC/Virtual Platform environmentCC++Data structure+4

VP SoC Lead

Mar 2017 – Jul 2018 · 1 yr 4 mos

Qualcomm

2 roles

Senior Staff Engineer/Mgr

Promoted

Nov 2016 – Mar 2017 · 4 mos

Engineer, Staff

Apr 2013 – Oct 2016 · 3 yrs 6 mos

Mirafra technologies

Verification Manager

Jul 2011 – Apr 2013 · 1 yr 9 mos · Bangalore

SystemC Modeling and verification.

SystemC ModelingVerificationSystemC

Stmicroelectronics

Technical Leader

Apr 2006 – Jul 2011 · 5 yrs 3 mos · Noida Area, India

Skyworks

Software Engineer

Feb 2005 – Mar 2006 · 1 yr 1 mo

Toshiba embedded software india pvt. ltd. (tesi)

Software Engg.

Feb 2004 – Feb 2005 · 1 yr

Education

Indian Institute of Technology (Banaras Hindu University), Varanasi

B.Tech — EcE

Jan 1999 – Jan 2003

Stackforce found 100+ more professionals with Soc & Emulation

Explore similar profiles based on matching skills and experience

Sonam Malik

Sr Manager

at Synopsys Inc

Bengaluru, India14 yrs 9 mos exp

Sunil Bansal

Sr. Principal Engineer, Emulation and Hardware Assisted Verification

at NXP Semiconductors

Assandh, India14 yrs 1 mo exp

EmulationVerification

Mamta Garg

Engineering Manager

at Meta

Bengaluru, India22 yrs 5 mos exp

SoCEmulationVirtual PrototypingFirmware Development

Vivek M.

Founder

at Minaions

Gurugram, India19 yrs 5 mos exp

Agentic AIBusiness OwnershipChatbot DevelopmentConversational AIEntrepreneurship

Divyanshi Singhal

Senior Design Verification Engineer

at AMD

Singapore, Singapore4 yrs 6 mos exp

RTL DevelopmentVerification EngineeringRTL Verification

Ankur Vaish

Design Verification Manager, Security

at Google

Bengaluru, India16 yrs exp

Design VerificationDevice Driver DevelopmentPCIe Protocol VerificationSystem Level VerificationTeam Leadership

Amrik Virdi

Emulation/Prototyping Methodology

at AMD

Delhi, India29 yrs 3 mos exp

EmulationPrototypingFPGA

Ankit Garg

Principal Software Eng Manager

at Microsoft

Noida, India18 yrs 10 mos exp