Vikas Sethi — CEO

Seasoned Semiconductor professional with extensive Hands on and Leadership experience taping-out a broad range of High Performance SoCs for x86 Microprocessor products, Mobile devices and Networking designs. Concept/Functional spec. to gdsii delivery of subsystems for targeted SOC(s) Seeded and scaled up teams for end-to-end delivery of designs across Functional/Design Verification, Physical Design, Circuit Design and DFT. Specializes in grooming leaders and driving design teams to successfully deliver Complex designs. Driven core subsystem delivery for multiple generations of ARM cores(A5, A7, A12, A15, A53, A57, A75, Mali, Shader) , IBM PPC cores, Ceva DSPs and ARC cores. Collaborating with Global Leadership teams to successfully drive business unit objectives spanning across multiple functional-teams. Strong business development skills: balancing stakeholders, negotiating offerings, scoping Turnkey engagements and establishing new Service lines. Conceived and drove the DDR Hardening(Subsystem integration, Hardening, Verification) Centre of Excellence for tapeout delivery to WW customers. Established methodologies (Implementation, DFT and Functional Verif) and Program Management practices to ensure successful delivery for First Time Correct Silicon. Worked closely with the foundries to enhance/propose new DFM-flows and worked with the Vendors to define tool direction(Noise/Power/EMIR/STA/Phy.v) – Silicon proven. Spearheaded the software design and development of a "Place & Route" tool for Sea of Gates family. GOLD(Graduate of the Last Decade) Nominee to IEEE Technical Activities Board, 1999-2000. Recipient of Multiple International Awards during academic years from IEEE Headquarters in the U.S.A.

Stackforce AI infers this person is a Semiconductor industry leader with extensive experience in SoC design and development.

Location: Bengaluru, Karnataka, India

Experience: 29 yrs 8 mos