V

Vamsi Gullapalli

CTO

Bengaluru, Karnataka, India20 yrs 11 mos experience
Most Likely To SwitchHighly Stable

Key Highlights

  • Lead Engineer with extensive VLSI and ASIC expertise.
  • Over a decade of experience in semiconductor design.
  • Strong background in formal verification and RTL design.
Stackforce AI infers this person is a semiconductor design expert with a focus on VLSI and ASIC technologies.

Contact

LinkedIn

Skills

Core Skills

VlsiAsic

Other Skills

Static Timing AnalysisSoCDFTCFormal VerificationVerilogRTL designFunctional Verification

Experience

20 yrs 11 mos
Total Experience
6 yrs 11 mos
Average Tenure
15 yrs 7 mos
Current Experience

Texas instruments

2 roles

Lead Engineer

Promoted

Feb 2012 – Present · 14 yrs 2 mos

Static Timing AnalysisSoCDFTVLSICFormal Verification+4

Senior Design Engineer

Sep 2010 – Feb 2012 · 1 yr 5 mos

Amd india pvt ltd

Design Engineer II

Nov 2008 – Sep 2010 · 1 yr 10 mos

St microelectronics pvt ltd

Design Engineer

May 2005 – Oct 2008 · 3 yrs 5 mos

Education

Indian Institute of Technology (Banaras Hindu University), Varanasi

Master's degree — Digital Techniques and Instrumentation

Jan 2003 – Jan 2005

Acharya Nagarjuna University

Bachelor's degree

Jan 1999 – Jan 2003

APRJC Nimmakur

Jan 1997 – Jan 1999

Stackforce found 100+ more professionals with Vlsi & Asic

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