ROHITKUMAR PATEL — Director of Engineering
• Test plan definition and preparation for ASIC • Writing RTL Codes and do verification for the same at block level as well as system level. • Synthesis with constraints • ASIC design flow development and implementation • Low power testing techniques • Provide support to make design verification/test friendly on ATE • DFT Logic insertion, ATPG & Pattern verification • JTAG & BIST Insertion and Verification • HVL coding, Test Bench writing • IP-SOC RTL & GATE level Debugging • Verification with timing and no-timing • Test/Code Coverage analysis and improvement • Constraint based STA & Formal Verification • Automation using Perl and Shell scripts • Silicon bring up, debug and support, Yield Analysis and Yield improvement. • Good collaboration with the designers, product engineers and project managers • Effective project planning and resource utilization
Stackforce AI infers this person is a semiconductor engineering expert with a focus on DFT and ASIC design.
Location: Bengaluru, Karnataka, India
Experience: 24 yrs 3 mos
Career Highlights
- Expert in ASIC design and DFT methodologies.
- Proven track record in team leadership and project management.
- Strong collaboration skills with cross-functional teams.
Work Experience
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sp college of engineering, gujarat
Lecturer in Electronics & Communication Department (3 yrs 2 mos)
Education
BE at Hemchandracharya North Gujarat University