Dhirendra Agrawal

Software Engineer

Bangalore, Karnataka, India13 yrs 8 mos experience

Most Likely To SwitchHighly Stable

Key Highlights

Senior Hardware Design Engineer at Nvidia.
Expert in RTL design and ASIC development.
Proven experience in SoC/ASIC verification.

Stackforce AI infers this person is a Hardware Design Engineer with expertise in ASIC and SoC verification.

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Skills

Core Skills

Rtl DesignAsic

Other Skills

VHDLVerilogVLSIModelSimCSoCHardwareSpecmanFPGAMicroprocessorsApplication-Specific Integrated Circuits (ASIC)Very-Large-Scale Integration (VLSI)System on a Chip (SoC)MatlabC++

Experience

13 yrs 8 mos

Total Experience

3 yrs 5 mos

Average Tenure

4 yrs 6 mos

Current Experience

Nvidia

Senior Hardware Design Engineer

Nov 2021 – Present · 4 yrs 5 mos · Bangalore Urban, Karnataka, India

VHDLVerilogVLSIModelSimCSoC+12

Intel corporation

CPU validation engineer

Oct 2020 – Nov 2021 · 1 yr 1 mo · Bangalore Urban, Karnataka, India

Amd

3 roles

Member Of Technical Staff

Jun 2020 – Sep 2020 · 3 mos

Working in infinity data fabric group. Where responsible for verification of Power management block at ip level.

Senior Design Engineer

Promoted

Jun 2016 – Sep 2020 · 4 yrs 3 mos

Design Engineer II

Feb 2015 – Jun 2016 · 1 yr 4 mos

Imagination technologies

Graduate hardware engineer

Jul 2012 – Jan 2015 · 2 yrs 6 mos · Pune

I am working as a SoC/ASIC verification engineer. I built verification environment by using SV UVM and Specman E language. I am also responsible for development of verification IP(UVC component)