ashish kamboj

Software Engineer

Noida, Uttar Pradesh, India9 yrs 7 mos experience
Highly Stable

Key Highlights

  • Expertise in Antennas and ASIC design.
  • Strong background in Design for Manufacturing.
  • Proven track record in physical verification engineering.
Stackforce AI infers this person is a semiconductor design engineer with expertise in VLSI and physical verification.

Contact

LinkedIn

Skills

Core Skills

AntennasApplication-specific Integrated Circuits (asic)Design For Manufacturing

Other Skills

PERCDebuggingVery-Large-Scale Integration (VLSI)MacrosPhysical DesignFloorplanningTCLGlobal Distribution Systems (GDS)Electrostatic Discharge (ESD)Layout Versus Schematic (LVS)Design Rule Checking (DRC)

Experience

9 yrs 7 mos
Total Experience
3 yrs 1 mo
Average Tenure
3 mos
Current Experience

Amd

Member of Technical Staff

Feb 2026 – Present · 3 mos · On-site

Qualcomm

3 roles

Staff Engineer

Dec 2025 – Jan 2026 · 1 mo

Senior Lead Engineer

Promoted

Nov 2022 – Jan 2026 · 3 yrs 2 mos

AntennasApplication-Specific Integrated Circuits (ASIC)

Senior Design Engineer

Sep 2020 – Nov 2022 · 2 yrs 2 mos

Design for ManufacturingPERC

Leadsoc technologies pvt ltd

Senior physical verification Engineer

Jan 2018 – Sep 2020 · 2 yrs 8 mos

Design for ManufacturingPERC

Wipro limited

Project Engineer

Sep 2016 – Jan 2018 · 1 yr 4 mos · Bengaluru, Karnataka, India

  • physical verification engineer
Design for ManufacturingPERC

Education

National Institute of Technology, Uttarakhand

Bachelor of Technology - BTech

Jan 2012 – Jan 2016

Stackforce found 100+ more professionals with Antennas & Application-specific Integrated Circuits (asic)

Explore similar profiles based on matching skills and experience

LA

Laxman Anantoju

Senior Design Engineer

at DPIIND

Bengaluru, India8 yrs 2 mos exp
Physical Design
Nandini Bharadwaj

Nandini Bharadwaj

Senior Design Engineer

at NVIDIA

Bengaluru, India8 yrs 8 mos exp
RTL DesignASIC
KV

Kiran V S

Senior Engineer

at MIPS

Bengaluru, India3 yrs 10 mos exp
Karthik Durga

Karthik Durga

ASIC Engineer DFT

at Meta

India14 yrs 9 mos exp
DFTIntegrated Circuit Design
Hemangi Deshmukh

Hemangi Deshmukh

Senior Silicon Design Engineer

at AMD

Hyderabad, India6 yrs 9 mos exp
Ranjith Reddy Jakka

Ranjith Reddy Jakka

Senior Design Engineer

at AMD

Hyderabad, India4 yrs 2 mos exp
RTL DesignIntegrated Circuits (IC)Functional Verification
Saurabh Kumar Yadav

Saurabh Kumar Yadav

Silicon Design Engineer 2

at AMD

Varanasi, India11 mos exp
Electrical EngineeringDigital IC Design
HK

HARIKUMAR K

ASIC Engineer Emulation

at Meta

Bengaluru, India14 yrs 11 mos exp
ASICEmulationDV EmulationValidation