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Kiran V S

Software Engineer

Bengaluru, Karnataka, India3 yrs 10 mos experience
Most Likely To Switch

Key Highlights

  • Expert in ASIC design and physical design methodologies.
  • Proficient in static timing analysis and timing closure.
  • Strong leadership skills with experience in team management.
Stackforce AI infers this person is a VLSI design engineer with expertise in ASIC development and physical design.

Contact

Skills

Other Skills

Team LeadershipPhysical DesignStatic Timing AnalysisApplication-Specific Integrated Circuits (ASIC)Shell ScriptingDesign for ManufacturingUnixVerilogPerlTCLSynopsys PrimetimeSynopsys toolsCMOSDesign Rule Checking (DRC)floor plan

Experience

3 yrs 10 mos
Total Experience
1 yr 11 mos
Average Tenure
2 yrs 7 mos
Current Experience

Mips

Senior Engineer

Oct 2023Present · 2 yrs 7 mos · Bengaluru, Karnataka, India · On-site

Mediatek

2 roles

Senior Engineer

Jul 2022Oct 2023 · 1 yr 3 mos

Technical Intern

Sep 2021Jun 2022 · 9 mos

Education

Vellore Institute of Technology

Master of Technology - MTech — VLSI

Jan 2020Jan 2022

RV VLSI

PG Diploma — Physical Design

Jan 2019Jan 2020

Sri Venkateswara College of Engineering and Technology, Chittoor

Bachelor's degree

Jan 2015Jan 2019

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