G

Gaurav Agrawal

Software Engineer

Bengaluru, Karnataka, India14 yrs 6 mos experience
Most Likely To SwitchHighly Stable

Key Highlights

  • 10+ years of experience in IC design
  • Winner of IEEE SSCS Student Circuits Contest
  • Author of multiple peer-reviewed publications and patents
Stackforce AI infers this person is a Semiconductor and Telecommunications expert with extensive experience in RF and Analog IC design.

Contact

Skills

Core Skills

Rf DesignIntegrated Circuit DesignAnalog Circuit Design

Other Skills

Cadence SoftwareMatlabVLSICadence VirtuosoVerilogSignal ProcessingCMOSPCB designMixed SignalSemiconductorsIntegrated Circuits (IC)Simulations

About

Analog / RFIC Design Engineer passionate about crafting integrated circuits which enables a plethora of wireless communication links around us. Well rounded experience of 10+ years in all spheres of IC design : Architecture, circuit design, RF centric layout and silicon bring-up. Winner of IEEE SSCS Student Circuits Contest and recipient of IEEE MTTS Pre-graduate Fellowship. Author of multiple peer reviwed publications and patents.

Experience

14 yrs 6 mos
Total Experience
2 yrs 1 mo
Average Tenure
3 yrs 10 mos
Current Experience

Aura semiconductor

2 roles

Senior Member of Technical Staff

Promoted

Jan 2025Present · 1 yr 4 mos · Bengaluru, Karnataka, India

  • Chip lead for high-performance integrated PLL with <50fs additive jitter
RF DesignCadence SoftwareIntegrated Circuit Design

Member of Technical Staff

Jul 2022May 2025 · 2 yrs 10 mos · Bengaluru, Karnataka, India

  • Chip lead for high performance PCIe clock buffers with 25fs additive jitter.
  • IC design for wireless communication applications in bulk / SOI CMOS, GaAs, HBT technologies including sub 1-dB NF LNA, 20W RF switch, highly linear and wideband phase shifter for beamforming, Power Amplifiers.
RF DesignCadence SoftwareIntegrated Circuit Design

Imec

Doctoral Candidate at imec and VUB

Aug 2021Jul 2022 · 11 mos · Leuven, Flemish Region, Belgium

  • Architecture, schematic design and layout of various blocks in SOI CMOS operating at 140 GHz: LNA, mixer, LO buffers, phase-shifters and very high-speed baseband circuitry. Discontinued the program after a year.
  • Courses undertaken :
  • Design of mm-Wave IC by Patrick Reynaert at KU Leuven
  • Achievements:
  • Winner of IEEE Solid State Circuits Society Students Circuit Contest - 2021
RF DesignCadence SoftwareIntegrated Circuit Design

Aura semiconductor

2 roles

Member Of Technical Staff

Jan 2021Jul 2021 · 6 mos

RF DesignCadence Software

Senior Design Engineer

May 2017Jan 2021 · 3 yrs 8 mos

  • Designing Analog/RF Integrated Circuits for IoT, cellular base-station.
RF DesignCadence SoftwareAnalog Circuit Design

Texas instruments

Analog Design Engineer

Dec 2015May 2017 · 1 yr 5 mos · Bengaluru Area, India

  • Working on crazy idea to push the power envelope down to enable several years of life for battery operated wireless sensor nodes.
RF DesignCadence Software

Qualcomm

RFIC design Intern

Mar 2015Jun 2015 · 3 mos · Greater Bengaluru Area

RF DesignCadence Software

Indian institute of technology, madras

Research Assistant- Analog/RFIC Design

Jul 2012Dec 2015 · 3 yrs 5 mos · Chennai

  • MS (by Research) thesis title: A Self-Interference Cancelling Receivers for Full-Duplex Radios.
RF DesignCadence Software

Mediatek india technology pvt. ltd

Quality Assurance Engineer-I

Jul 2011Apr 2012 · 9 mos · Noida, Uttar Pradesh, India

Education

Indian Institute of Technology, Madras

Master of Science (By Research) — Analog/ RFIC design

Jan 2012Jan 2015

University College of Engineering Kota

Bachelor of Technology (Hons) — Electronics and Communication Engineering

Jan 2007Jan 2011

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