Das, Ipsita

Engineering Manager

Bengaluru, Karnataka, India23 yrs 7 mos experience
Highly Stable

Key Highlights

  • Expert in FPGA design and development.
  • Proven leadership in engineering management roles.
  • Strong background in RTL design and verification.
Stackforce AI infers this person is a seasoned FPGA design expert with extensive experience in semiconductor engineering.

Contact

LinkedIn

Skills

Other Skills

VerilogFPGAVHDLXilinxModelSimEDKLatticeAlteraRTL designDebuggingClearCaseSimulationsSystemCEmbedded SoftwareLogic Synthesis

About

Experience in FPGA design

Experience

23 yrs 7 mos
Total Experience
3 yrs 2 mos
Average Tenure
1 yr 4 mos
Current Experience

Altera

Engineering Manager

Jan 2025 – Present · 1 yr 4 mos · Bengaluru, Karnataka, India · On-site

Intel corporation

Technical Manager

Nov 2019 – Jan 2025 · 5 yrs 2 mos

Coqube semiconductor

Director

Jan 2019 – Oct 2019 · 9 mos · Bangalore

Seagate technology

Staff Engineer

Apr 2016 – Oct 2018 · 2 yrs 6 mos · Bangalore

Lekha wireless solutions pvt. ltd.

Lead Engineer

Oct 2011 – Mar 2016 · 4 yrs 5 mos · Bangalore

Alcatel-lucent

Lead Engg

Feb 2007 – Oct 2011 · 4 yrs 8 mos · Bangaon Area, India

L&t infotech

Sr Software Engg

Apr 2005 – Jan 2007 · 1 yr 9 mos

Coreel technologies

Design Engg

Apr 2002 – Apr 2005 · 3 yrs

Education

Sandeepani School of VLSI

PG-Diploma — VLSI Design & Verification

Jan 2001 – Jan 2002

Berhampur University

Bachelor of Engineering (B.E.)

Jan 1997 – Jan 2001

Stackforce found 100+ more professionals with Verilog & FPGA

Explore similar profiles based on matching skills and experience

Harshad Kulkarni

Harshad Kulkarni

Lead FPGA Design Engineer

at Baker Hughes

Pune, India9 yrs 7 mos exp
Bekkam Satheesh

Bekkam Satheesh

Senior Staff Manager

at Marvell Technology

Hyderabad, India13 yrs 3 mos exp
DM

Dr Kalaiyarasi Mani

Associate Professor

at Bannari Amman Institute of Technology

Coimbatore, India14 yrs 11 mos exp
Sarang Shelke

Sarang Shelke

Design Engineering Group Director

at Cadence Design Systems

Pune, India26 yrs 9 mos exp
ElectronicsEngineering
Rupesh Moharir

Rupesh Moharir

Director Design Verification

at Intel Corporation

India20 yrs 10 mos exp
SOC VerificationASIC Verification
Naveen Desai

Naveen Desai

Associate Vice President

at Tessolve Semiconductor Pvt. Ltd.

Bengaluru, India21 yrs 7 mos exp
Rupal Gupta

Rupal Gupta

Engineer

at Qualcomm

Allahabad, India13 yrs 3 mos exp
Embedded SystemsDigital Signal Processors
Harshil Suthar

Harshil Suthar

FPGA Intern

at HFT

Ahmedabad, India0 mo exp
FPGAVerification