Rupesh Moharir — Director of Engineering
have broader experience in ASIC/SoC verification with exposure to verification methodologies like OVM UVM and HW-SW Co-verification. Expertise in System Verilog ,C based and multi language verification environments with sound knowledge of OVM and UVM methodologies. Defining processor agnostic main band protocol stimulus methodology for the large and complex server SOCs using OVM/UVM. Specialties - ASIC/SoC verification collateral design/architecture and development, System Verilog, OVM, UVM, HDL, System Verilog. - Complex SOC verification for server chip, mobile chips. - have working experience in USA,Germany, Sweden, France. - Managing Team and full chip verification activities, starting from scratch.
Stackforce AI infers this person is a leader in ASIC/SoC verification within the semiconductor industry.
Experience: 20 yrs 9 mos
Skills
- Soc Verification
- Asic Verification
Career Highlights
- Expertise in ASIC/SoC verification methodologies.
- Proven leadership in managing full chip verification activities.
- Experience across multiple countries in the tech industry.
Work Experience
Intel Corporation
senior manager design verification (4 yrs)
Director Design Verification (7 yrs 9 mos)
manager design verification (3 yrs)
L&T Technology Services Limited
Sr specialist (1 yr)
Synopsys Inc
Sr R&D Engg (10 mos)
Wipro
Architect ASIC/SOC Verification (11 yrs 2 mos)
Education
Engineer's Degree at RGPV Bhopal
