Dayanand M — Software Engineer

13+ years of Professional Experience in Analog/mixed signal Layout design and having expertise with cutting edge "FINFET" Advanced node technologies like ("5nm" ,"7nm"), Planer CMOS technologies technologies from TSMC , GLOBAL FOUNDRIES, INTEL and SAMSUNG. -> Having good understanding on design dependent layouts for mostly used "ips" used for high speed data processing.(SERDES,HBM, DDR etc) -> Excellent understanding of most of the high speed analog design and layout . -> Excellent communication with cross functional team like ANALOG. -> Excellent technical skills and in-depth understanding of layout issues and mitigations . - Well proximity Effect(WPE), LOD , Latch up , Antenna Effect - Electro migration(EM) and IR Drop. - Electro static Discharge (ESD) (HBM/CDM) , PERC - DFM and Reliability Issues. - Cross Talk and Matching , etc .. ->EXPERTISE IN the Following Design tools . EDA Tools - Cadence( Virtuoso(L & XL, EXL), Synopsys Galaxy Verification tools : Caliber , PVS , ASSURA (LVS/DRC/ERC) Extraction : Caliber STAR RC ,QRC, PEX EM/IR : Voltus-Fi-XL(Cadence) , Totem(Ansys) ->SPECIALITIES (following are my filed of specialization) 1) SERDES IP (RX/PLL) 2) Memory Controllers IP (HBM(RX) and DDR(RX)) 3) ADC (SAR Architecture)

Stackforce AI infers this person is a Semiconductor Design Engineer with expertise in high-speed analog and mixed-signal layout design.

Location: Bengaluru, Karnataka, India

Experience: 15 yrs 3 mos