S

Sateesh Reddy

CTO

Bengaluru, Karnataka, India20 yrs 2 mos experience
Most Likely To SwitchHighly Stable

Key Highlights

  • Expert in ASIC and VLSI design.
  • Proficient in ARM and FPGA technologies.
  • Strong background in RTL design and verification.
Stackforce AI infers this person is a VLSI and ASIC design expert with extensive experience in FPGA technologies.

Contact

LinkedIn

Skills

Core Skills

AsicVlsiSocFpgaRtl Design

Other Skills

palladium emulatorDDR5ARMXILINX FPGAsPrototypingHigh performance video sub-systemsDesigningMicro-architecture developmentHLS toolAXImemory controller modelsARM BFMVideo sub-system reference designXilinxVerilog

Experience

20 yrs 2 mos
Total Experience
3 yrs 4 mos
Average Tenure
11 yrs
Current Experience

Amd

Senior Member Of Technical Staff

Jun 2015 – Present · 11 yrs · Hyderabad, Telangana, India

  • palladium emulator, DDR5
palladium emulatorDDR5ASICVLSI

Mirafra technologies

Member of Technical Staff

Mar 2013 – Jun 2015 · 2 yrs 3 mos · bangalore

  • Prototyping ARM Based Multi-proc Chip on XILINX FPGAs
ARMXILINX FPGAsPrototypingSoCFPGA

Xilinx

Design engineer-II

Jun 2011 – Mar 2013 · 1 yr 9 mos · Hyderabad Area, India

  • Designing High performance Video sub-systems
High performance video sub-systemsDesigningVLSIRTL design

Poseidon

smts

Nov 2008 – Jul 2011 · 2 yrs 8 mos

  • Micro-architecture development of HLS tool
Micro-architecture developmentHLS toolASICVLSI

Mentor graphics

MTS

Dec 2006 – Nov 2008 · 1 yr 11 mos · Hyderabad Area, India

  • Develop AXI and memory controller models to verify ARM BFM
AXImemory controller modelsARM BFMASICVLSI

Poseidon design system

MTS

Mar 2006 – Nov 2006 · 8 mos · bangalore

  • Video sub-system reference design
Video sub-system reference design

Education

Indian Institute of Technology, Madras

Master of Science (MS) — VLSI

Jan 2003 – Jan 2005

JNTU

JNTU

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