Debasish Dwibedy — Software Engineer
Welcome to my profile! • IO and Analog circuit design professional with 10+ years of experience, specializing in GDDR/LPDDR/DDR circuit design (Rx, Tx, Reference Generation, Calibration, LDO). • Proven track record in delivering DDR libraries (DDR5, DDR4, DDR3, LPDDR4, LPDDR5X, GDDR7) and expertise in process nodes (TSMC N3/N4/N7) with a focus on aging and self-heating effects. • Experienced in high-speed I/O interfaces, Datapath architecture, circuit design, layout, timing closure, power grid planning. • Strong understanding of ESD and SI/PI implications. • Proficient in NAND FLASH Memory ZQ calibration circuits, interface read/write training, power grid planning, and dynamic power droop simulations. • Architected and designed custom circuits for NAND flash memory, including TX, RX, ZQ calibration, duty-cycle correction, FIFO, and essential DDR2/3 data-path/IO circuits. • Experienced in silicon bring-up, characterization, and debugging with high-speed CLGA package probing. • Skilled in project planning, risk management, and innovative design strategies. Effective team leader and mentor with excellent problem-solving and communication skills.
Stackforce AI infers this person is a semiconductor design expert with extensive experience in high-speed I/O and memory technologies.
Location: Bengaluru, Karnataka, India
Experience: 11 yrs 8 mos
Career Highlights
- 10+ years in IO and Analog circuit design.
- Expertise in DDR libraries and high-speed I/O interfaces.
- Strong leadership and mentoring skills.
Work Experience
Aptiv
Senior Staff Engineer (1 yr 7 mos)
AMD
Member Of Technical Staff (2 yrs 9 mos)
Samsung Semiconductor India R&D
Staff Engineer (11 mos)
Western Digital
Staff Design Engineer (2 yrs 4 mos)
Senior Design Engineer (2 yrs 2 mos)
SanDisk®
Design Engineer II (11 mos)
Defence Research and Development Organisation
Project Traniee (11 mos)
Education
Master of Technology (MTech) at NIT WARANGAL
Bachelor of Technology (B.Tech.) at CVRCE