Siddhu B.

Software Engineer

Bengaluru, Karnataka, India9 yrs 4 mos experience

Highly Stable

Key Highlights

9.5 years of experience in physical design.
Successfully taped out over 10 projects.
Expertise in multiple technology nodes including 6nm and 5nm.

Stackforce AI infers this person is a Semiconductor Design Engineer with extensive experience in physical design and verification.

Contact

Skills

Core Skills

Physical DesignPhysical Verification

Other Skills

Design Rule Checking (DRC)Full Physical VerificationStatic Timing AnalysisDRC CleaningCTSRTL to GDSIICLPLECBlock co-ordinatorLow-power DesignScriptingRTL VerificationSemiconductorsApplication-Specific Integrated Circuits (ASIC)

About

9.5 years of experience on physical design. successfully taped out two critical projects on Samsung foundry, sf2 node. (mobile application) and sf4 node (AI computing ) Worked in tsmc latest 6 nm/5nm and N3e technology node. Done Full PNR (Netlist to GDSII) . Full Physical verification, DRC cleaning (TSMC & GF ) full signoff , Full STA Timing closure Worked in PNR tools ICC ICC2 INNOVUS , Worked in PV tools CALIBRE from mentor . signoff tools :- tempus , primetime, STAR-RC, tweaker. Worked in two 28 nm , two 22 nm (audio processor), one 7 nm ( mobile processor) . Worked in Low power design with max 7 voltage domains. flow handling Successfully taped out more than 10 projects.

Experience

9 yrs 4 mos

Total Experience

5 yrs 10 mos

Average Tenure

2 yrs

Current Experience

Samsung semiconductor

Senior Staff Engineer

May 2024 – Present · 2 yrs · Bengaluru, Karnataka, India · On-site

Mediatek

3 roles

Staff Engineer

Jan 2023 – Jun 2024 · 1 yr 5 mos

6 years plus experience in physical design

Physical VerificationDesign Rule Checking (DRC)Physical Design

Senior Physical Design Engineer

Promoted

Sep 2021 – Jan 2023 · 1 yr 4 mos

have 5.7 years of experience with expertise in pnr netlist to gds and physical verification drc erc lvs

Physical DesignPhysical Verification

Physical Design Engineer

Jun 2017 – Nov 2021 · 4 yrs 5 mos

Have 4.8years of experience in physical design . full physical verification ,static timing analysis, DRC cleaning (tsmc, global foundary ). Successfully taped out six projects . two 28nm , two 22 nm (audio processor ), one 7 nm (mobile processor ), one 12 nm (gaming console).

Full Physical VerificationStatic Timing AnalysisDRC CleaningPhysical DesignPhysical Verification

Synapse design inc.

Project Engineer

Jan 2017 – Sep 2021 · 4 yrs 8 mos · Bengaluru Area, India

Have 4.5 years of experience in physical design . full physical verification ,static timing analysis, DRC cleaning (tsmc, global foundary ). Successfully taped out six projects . two 28nm , two 22 nm (audio processor ), one 7 nm (mobile processor ), one 12 nm (gaming console).

Full Physical VerificationStatic Timing AnalysisDRC CleaningPhysical DesignPhysical Verification