Sandeep Patil

CTO

Bengaluru, Karnataka, India12 yrs 5 mos experience

Highly Stable

Key Highlights

10+ years in semiconductor industry with UEFI firmware expertise.
Led cross-geo teams in power management initiatives.
Strong background in Functional Safety and MISRA-C compliance.

Stackforce AI infers this person is a Semiconductor and IoT Firmware Engineer with strong expertise in Functional Safety.

Contact

Skills

Core Skills

FirmwarePower ManagementEmbedded SystemsFunctional Safety

Other Skills

UEFI firmwarePMC/GPIO driversACPI firmwareDebug leadershipFailure analysisZephyrFreeRTOSSPI driversPCIe Mailbox driversLinux driver developmentWindows driversEnergy managementJava DevelopmentQuality AssuranceC

About

Experienced Silicon/Firmware Engineer with 10+ years in the semiconductor industry, specializing in UEFI firmware, embedded systems, and Functional Safety (FuSa). Skilled in ThreadX, Zephyr, FreeRTOS, and Linux driver development, with hands-on expertise in power management, safety middleware, and hardware–software integration for Intel Client SoCs and IoT platforms. Proven track record in leading cross-geo teams, driving debug leadership, and ensuring MISRA-C compliance for safety-critical systems. Strong engineering professional with a Master’s in Computer Science from NIT Rourkela.

Experience

12 yrs 5 mos

Total Experience

5 yrs 10 mos

Average Tenure

8 mos

Current Experience

Google

Senior Silicon Architect

Oct 2025 – Present · 8 mos · Bengaluru, Karnataka, India · Hybrid

Power and Performance (PnP)

Intel corporation

3 roles

Silicon Firmware Engineer

Mar 2020 – Sep 2025 · 5 yrs 6 mos

Developed UEFI-based PMC/GPIO drivers for Intel Client SoCs.
Implemented ACPI firmware supporting PEP, SCIs, PCIe/I²C device D0/D3 transitions, wake events, and system states (S0/S3/S4/S5/S0ix).
Served as BIOS Power Management POC across multiple Client SoCs.
Led the Client BIOS Power Management cross-geo team, coordinating technical efforts across regions.
Acted as Debug Lead for a Client Silicon program, driving debug, failure analysis, and resolution of system-level issues.

UEFI firmwarePMC/GPIO driversACPI firmwarePower ManagementDebug leadershipFailure analysis+1

Software Development Engineer

Jun 2016 – Feb 2020 · 3 yrs 8 mos

Contributed to multiple IoTG projects based on Zephyr and FreeRTOS, including Functional Safety (FuSa) initiatives.
Designed and developed SPI and PCIe Mailbox drivers, and built safety middleware on ThreadX RTOS.
Implemented and maintained the Linux PCIe Mailbox driver with corresponding user-space APIs.
Led initiatives to ensure MISRA-C compliance, enhancing code quality and meeting safety standards.-

ZephyrFreeRTOSFunctional SafetySPI driversPCIe Mailbox driversLinux driver development+1