Darshit Pandya

Software Engineer

Bengaluru, Karnataka, India8 yrs 4 mos experience

AI EnabledAI ML Practitioner

Key Highlights

Over 7 years of CPU verification expertise.
Hands-on experience with arm, MIPS, and RISC-V architectures.
Proficient in complete verification cycle from testplan to closure.

Stackforce AI infers this person is a CPU Verification Specialist with extensive experience in semiconductor design and verification.

Contact

Skills

Core Skills

Functional VerificationSystemverilogTriage

Other Skills

Artificial Intelligence (AI)Computer ArchitectureUniversal Verification Methodology (UVM)DebuggingTestplanTestbenchAutomationC++CEmbedded Systems8051 MicrocontrollerMatlabProgramming in C and Embedded CBluetoothWireless

About

CPU Verification professional with 7+ years of experience in the industry with the well known CPU big heads. I have worked on arm processors v8.x to v9.x architectures, for CPU Design Verification. I have worked on a complete verification cycle, starting from writing a testplan to coverage closure. Across the industry I have had the privilege to work on the latest CPUs and how they are implemented in SoC. I have worked on all kinds of CPU architectures like arm, MIPS and RISC-V, which helped me expand my knowledge in all architectures and puts me in a well placed unique position to understand the need of CPU Verification, it's complexity and how well it can be handled.

Experience

8 yrs 4 mos

Total Experience

1 yr 5 mos

Average Tenure

1 yr

Current Experience

Synopsys inc

Senior Staff Engineer

Jun 2025 – Present · 1 yr · Bengaluru, Karnataka, India

Artificial Intelligence (AI)Computer ArchitectureFunctional VerificationSystemVerilogUniversal Verification Methodology (UVM)Debugging+2

Mediatek

Staff Engineer

Mar 2024 – Jun 2025 · 1 yr 3 mos · Bengaluru, Karnataka, India

Worked on the RISC-V UVC development from scratch for Unit Level Verification.

Artificial Intelligence (AI)SystemVerilogTestplanTestbenchAutomationComputer Architecture+3

Samsung semiconductor

Staff Engineer

Aug 2023 – Mar 2024 · 7 mos · Bengaluru, Karnataka, India

Responsible for the verification of CPU-AP interface.
Developed AP model for the CPU interface verification.

TriageArtificial Intelligence (AI)

Amd

Sr. Silicon Design Engineer

Aug 2022 – Jul 2023 · 11 mos · Bengaluru, Karnataka, India

RAS Feature owner across SOC.
Developed and designed testcases for error injection to different IPs in SOC.
Focused on finding bugs across IPs for RAS.
Making sure errors are reported and propagated as per the AMD MCA Architecture across all IPs

Triage

Arm

2 roles

Verification Engineer

Oct 2019 – Aug 2022 · 2 yrs 10 mos

working on V9 compliant CPUs
Developed the Directed Test-cases for V9 specific features
Debugged and filed critical bugs on RIS, for the V9 compliant cores
Development of RIS stimulus to stress architecture and micro architectural features.

Triage

Graduate Engineer

Apr 2018 – Sep 2019 · 1 yr 5 mos

Design verification for v8 to v8.4 architecture compliant CPUs
Worked on directed as well as RIS stimulus to find the bugs on different implementation features .
Gained good understanding of computer architecture and micro-architectural designs for out of order pipelines, Memory architecture
Have handled complete RTL verification cycle, including CPU bring-up, verification of design and coverage
Good knowledge on ARM-V8.x architecture

Triage