sairam gopavarapu — Software Engineer

Having 6 years of experience in VLSI physical Implementation and timing closure for blocks, subsystem and full chip designs. • very good knowledge on full chip & sub systems PnR closure, tcreation of multiple voltage regions, TMAC Insertions and RDL Routing on critical nets, as per requirements. Efficient in high count macro placement based on data flow diagram. • Skilled at analyzing and solving IR drop & EM issues. • Good at Timing driven placement to improve timing for complex designs. • Experienced with 130nm,55nm,14nm, 7nm,6nm and 5nm Technologies. • Physical Chip Design including Synthesis, PnR, STA and Physical Verification.

Stackforce AI infers this person is a VLSI Physical Design Engineer with expertise in advanced semiconductor technologies.

Location: Hyderabad, Telangana, India

Experience: 8 yrs 5 mos