Alka Judge

CTO

Noida, Uttar Pradesh, India6 yrs 2 mos experience

Key Highlights

  • Expert in logic synthesis and static timing analysis.
  • Proficient in various EDA tools and methodologies.
  • Strong background in semiconductor design and validation.
Stackforce AI infers this person is a Semiconductor Design Engineer with expertise in EDA tools and methodologies.

Contact

LinkedIn

Skills

Core Skills

Power AnalysisLogic SynthesisStatic Timing Analysis

Other Skills

PowerProTMBISTShell ScriptingATPGSAIFCLPLECERCTVSDCTCLMultitaskingAutomatic Test Pattern Generation (ATPG)physical designConformal LECDigital Designs

Experience

6 yrs 2 mos
Total Experience
2 yrs 1 mo
Average Tenure
1 yr 11 mos
Current Experience

Siemens eda (siemens digital industries software)

Lead Member of Technical Staff

Jul 2024 – Present · 1 yr 11 mos · Noida, Uttar Pradesh, India · On-site

PowerProPower Analysis

Mediatek

Synthesis and STA engineer

Nov 2022 – Jul 2024 · 1 yr 8 mos · Bengaluru, Karnataka, India · On-site

  • Logic Synthesis at a block level (with DFT scan chain stitches and ICG insertion) with different optimization settings for better PPA, ATPG, TMBIST, SAIF.
  • CLP, LEC, ERC and TVSDC checks.
  • STA
  • Weekly MTBF runs and fixing critical bugs.
TMBISTShell ScriptingATPGSAIFCLPLEC+4

Cadence design systems

2 roles

Product Validation Engineer

Promoted

Oct 2018 – May 2021 · 2 yrs 7 mos · Noida

TCLMultitasking

Engineer

May 2018 – Oct 2018 · 5 mos · Noida

Education

Dayalbagh Educational Institute, Agra

Diploma in Electronics

I. K. Gujral Punjab Technical University (IKGPTU)

Bachelor of Technology - BTech

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