G

Gaurav Kumar Bansal

Co-Founder

Bengaluru, Karnataka, India16 yrs 6 mos experience

Key Highlights

  • Director and Co-founder of a semiconductor company
  • Expertise in physical design and verification
  • Proven track record in full-chip floorplanning
Stackforce AI infers this person is a semiconductor design expert with strong capabilities in physical design and verification.

Contact

LinkedIn

Skills

Core Skills

Physical DesignPhysical Verification

Other Skills

Full-chip FloorplanEM/IR analysisGDSBack-end physical integrationVerilogVLSISoCIntegrationASICSemiconductors

About

Physical Design Physical Verification Fullchip Floorplanning

Experience

16 yrs 6 mos
Total Experience
--
Average Tenure
--
Current Experience

Signoff semiconductors

Director & Co-founder

Feb 2016 – Present · 10 yrs 4 mos · Bengaluru, Karnataka, India

Physical DesignPhysical Verification

Intel corporation

Component Design Engineer

May 2014 – Feb 2016 · 1 yr 9 mos · Bangalore

  • My responsibilities included but not limited to creating full-chip floorplan and providing it to PnR team, physical verification, EM/IR analysis.
Full-chip FloorplanPhysical VerificationEM/IR analysisPhysical Design

Lsi corporation

Senior Design Engineer

Oct 2011 – May 2014 · 2 yrs 7 mos · Bangalore

  • I run complete physical design flow, from Netlist to GDS.
Physical DesignGDS

Freescale semiconductor

Design Engineer

Apr 2010 – Oct 2011 · 1 yr 6 mos · Noida

  • Back-end physical integration.
Back-end physical integrationPhysical Design

Nokia siemens networks

Graduate Engineer Trainee

Nov 2009 – Mar 2010 · 4 mos

  • National Transmission Team

Education

Motilal Nehru National Institute Of Technology

B.Tech. — Electronics and Communication Engg

Jan 2005 – Jan 2009

Stackforce found 100+ more professionals with Physical Design & Physical Verification

Explore similar profiles based on matching skills and experience

Shaili Mishra

Shaili Mishra

Associate Software Engineer

at Dassault Systemes Solutions Lab

Satna, India2 yrs 9 mos exp
Product Lifecycle Management
Sathish Pochampalli

Sathish Pochampalli

Design Implementation Engineer

at Qualcomm

Hyderabad, India3 yrs 11 mos exp
SynthesisStatic Timing AnalysisPhysical DesignEmbedded Systems
HARISH RAO L

HARISH RAO L

Physical Design Engineer (On contract)

at Intel

Hyderabad, India2 yrs 10 mos exp
Physical Design EngineerDigital Hardware DesignSynthesis Design
Shivanshu Trivedi

Shivanshu Trivedi

Physical Design Engineer

at NVIDIA

Lakhimpur, India7 yrs 10 mos exp
Physical DesignStatic Timing Analysis
Karthik Balakrishnan

Karthik Balakrishnan

Senior Manager

at Eximius Design

Bangalore Urban, India17 yrs 9 mos exp
Physical VerificationPDK
Jinu M G.

Jinu M G.

Sr staff engineer

at Synopsys Inc

Bengaluru, India8 yrs 1 mo exp
EDARedhawk
guruprasad karki

guruprasad karki

Senior Staff Engineer

at Samsung Electronics

Bengaluru, India18 yrs exp
AnalogPower ManagementRF
Rebin M R

Rebin M R

Design Engineer

at NXP Semiconductors

Bengaluru, India9 yrs 3 mos exp
FloorplanningPowerplanning