Karthik Balakrishnan — Associate Partner
15+ years in industry. PDV closure from floorplan to Tape out. PERC ESD and LDL solutions. CAD development and PDK development. Hands on experience in all nodes till 5nm.
Stackforce AI infers this person is a highly skilled Principal Engineer in semiconductor design and verification.
Location: Bangalore Urban, Karnataka, India
Experience: 17 yrs 9 mos
Skills
- Physical Verification
- Pdk
Career Highlights
- 15+ years of experience in Physical Verification.
- Expert in PDK and CAD development.
- Hands-on experience with nodes down to 5nm.
Work Experience
Eximius Design
Senior Manager (6 yrs 1 mo)
Intel Corporation
DA (1 yr 11 mos)
AMD
Senior Design Engineer (5 yrs 4 mos)
University of Maryland Baltimore County
Teaching Assistant (11 mos)
Synopsys
CAE II (2 yrs)
Synopsys India Pvt. Ltd.
CAE (2 yrs 5 mos)
Education
at Shanmugha Arts, Science, Technology and Research Academy