D

Dhruv P

CTO

Hyderabad, Telangana, India15 yrs experience

Key Highlights

  • Expert in semiconductor technology and innovation.
  • Led teams in advanced microchip development.
  • Passionate about solving complex technical challenges.
Stackforce AI infers this person is a leader in semiconductor technology with expertise in microchip design and development.

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Skills

Core Skills

System On A Chip (soc)Dft MethodologiesDft Strategies

Other Skills

DFTscan insertionBIST techniquesscripting languages (TCL, Perl)ATPGMemory BISTJTAG solutionsSemiconductor EngineeringChip ArchitectureChipsetVlsiESDMTechnical Staff ManagementDirector levelTechnical Recruiting

About

I’m the Technical Director at Vibhuaya Technologies We design and manufacture advanced microchips that power innovations across industries—from consumer electronics to telecommunications. With years of hands-on experience in the semiconductor industry, I’ve led my team to push the boundaries of what microchips can do. Whether it’s developing chips that enhance smartphone performance or ones that support satellite communications, I’ve been at the forefront of technological advancements that shape the future. Here’s what I’m passionate about: • Solving complex technical challenges • Managing projects from start to finish • Ensuring top-quality innovation in every product • Collaborating with a talented team to bring ideas to life What excites me the most? - Seeing how our technology enables the next wave of innovations - Seeing our work drive tech advancements, from gadgets to space tech Let’s Connect: If you’re passionate about microchip technology, want to explore innovative partnerships, or simply want to chat, feel free to reach out. Let’s collaborate and shape the future together!

Experience

15 yrs
Total Experience
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Average Tenure
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Current Experience

Vibhuaya technologies

Technical Director

Jun 2024Present · 2 yrs · Hyderabad, Telangana, India · On-site

  • In my role as the Technical Director at Vibhuaya Technologies, I was responsible for overseeing all technical activities across the company. Leading DFT and post-silicon activities, I worked towards optimizing design and testing processes to contribute to the overall development cycle. By collaborating with teams and implementing strategic solutions, I was able to drive innovation and efficiency within the organization.
System on a Chip (SoC)DFT

Intel corporation

Senior Design Engineer

Jan 2018Jan 2024 · 6 yrs · Greater Bengaluru Area

  • Developing and implementing DFT architectures for SoCs.
  • Collaborating with design teams to enhance testability in RTL designs.
  • Utilizing industry-standard tools (e.g., Mentor Graphics Tessent, Synopsys) for vector generation and verification.
  • Leading post-silicon debugging efforts to improve yield and quality.
  • Documenting DFT specifications and driving automation strategies to optimize workflows.
  • Skilled in DFT methodologies, scan insertion, BIST techniques, and scripting languages (TCL, Perl). Committed to delivering high-quality products with efficient testing processes.
DFT methodologiesscan insertionBIST techniquesscripting languages (TCL, Perl)

Amd

Design Engineer

Jan 2011Jan 2018 · 7 yrs · Hyderabad, Telangana, India

  • Implementing DFT strategies such as scan insertion and ATPG.
  • Developing Memory BIST and JTAG solutions.
  • Verifying DFT through simulation and formal methods.
  • Collaborating with teams for silicon validation.
  • Analyzing coverage and debugging failures.
DFT strategiesscan insertionATPGMemory BISTJTAG solutions

Education

Jawaharlal Nehru Technological University

Master's degree

Jan 2008Jan 2010

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