Rashmi P. — Product Engineer
Good understanding of the ASIC and FPGA design flow. Extensive experience in writing RTL models using Verilog HDL. Good experience in writing Test benches using SystemVerilog and UVM.
Stackforce AI infers this person is a VLSI Design and Verification expert in the semiconductor industry.
Location: Bengaluru, Karnataka, India
Experience: 4 yrs 6 mos
Career Highlights
- Strong expertise in ASIC and FPGA design flows.
- Extensive experience in RTL modeling with Verilog HDL.
- Proficient in SystemVerilog and UVM for test bench development.
Work Experience
Scaledge Technology
Design Verification Engineer (2 yrs 2 mos)
XILINX AMD
Full chip verification engineer -Contractor (2 yrs 4 mos)
Education
BE - Bachelor of Engineering at Goa Engineering College - Government of Goa
