Sep 2021 – Aug 2024 · 2 yrs 11 mos · San Francisco Bay Area

Jan 2015 – Aug 2021 · 6 yrs 7 mos

• Started PrimeTime ECO product team. Build PrimeTime ECO product/team/customer base from concept to market leader (70%). This is most commonly used sign-off optimization tool in market with complete solution in physical timing, DRC optimization and power/area recovery. One of the fastest deployed features/licenses in the customer base. It increased two additional tier premium product license increasing revenue.
• PrimeTime ECO is distributed/multi threaded optimization high perf engine in C++/TCL and scales to 100M+ instance designs. It scales to 100+ core/machines. Supports both on-premise and cloud use.
• Used hands-on management in s/w development, validation and customer eval & deployment with enabling individual team success.
• Product Management: Prioritization of requests, customer interaction, UX design, Roadmap, coordinate with application engineer/marketing, Deployment engagement, Webinar, customer events/training, requirement spec review, bench marking.
• Project Management: Product planning, team estimation, regular tracking, status report to top management and delivery projects on time, using semi-agile dev process.
• Team Management: Interview, hiring, coaching, providing direction and motivation to an excellent team, reward/recognition, technical brainstorming and design/spec review, code review, regression review, QoR review.
• Key Technologies: Distributed, multithreading, EDA algorithms, timing optimization, power optimization, physical database management, netlist, timing graph, performance & memory optimization, C, C++, LEF/DEF, Static Timing Analysis, Signal Integrity modeling.
• R&D team enhanced the optimization engine to leverage Machine Learning(ML) technology to be part of solution to get 5X faster solution. Key emphasize is no loss of Quality of Results. Later machine learning expanded for in memory training and inference s.t. user doesn't need to manage data.
• Late stage Optimization technology expanded to improve design yield and cell EM.

May 2008 – Jan 2015 · 6 yrs 8 mos

• Management of PrimeTime SI product/team. Grew customers usage of the premium product from 50% to 90%, eventually making it default product.
• Hand-on management of the team. During this time my team delivered,
• The first distributed STA SI solution 2X runtime/memory reduction.
• A scalable hierarchical SI solution called HyperScale.
• Performance and memory improvement and user productivity improvement.
• Clock mesh analysis
• This position involved,
• Product Management: Prioritization of requests, customer interaction, UX design, Roadmap, coordinate with application engineer/marketing, Deployment engagement, Webinar, customer events/training, requirement spec review, benchmarking.
• Project Management: Product planning, team estimation, regular tracking, status report to top management and delivery projects on time, quality metric tracking.
• Team Management: Interview, hiring, coaching, providing direction and motivation to an excellent team, reward/recognition, technical brainstorming and design/spec review, code review, regression review, algorithm review.
• Key Technologies: Distributed, multithreading, EDA algorithms, netlist, timing graph, performance & memory optimization, Static Timing Analysis, Signal Integrity modeling.

May 2005 – May 2008 · 3 yrs

• Lead PrimeTime SI product technology development. Trained and mentored junior engineers and interns. Direct communication with key customers and field engineers to improve product stickiness.
• Implemented PrimeTime SI link to spice simulators and do an targeted spice accurate analysis and report to user. Simplified the spice sensitization engine for accurate spice correlation.
• Development of distributed STA and design partitioning algorithm.
• Implemented common clock OCV consideration for victim and aggressors.
• Lead 2X runtime improvement with creative algorithm with same QoR.
• CPU cache miss profiler and selective prefetch for runtime improvement by reducing cache miss.
• Tools/Technologies: C, C++, Linux, Purify, Profiler, Coverity, TCL,

May 2001 – May 2005 · 4 yrs

• Part of early development team of PrimeTime SI, a market leader in Signal Integrity.
• During this period developed (from func spec to coding & unit testing) key technology to reduce false posities with out missing real design violations.
• Implemented Path Based Analysis(PBA) first in industry to improve accuracy. Widely deployed improving opportunity for design optimization in sign-off.
• Reduced graph based analysis (GBA) false noise violations using graph algorithms.
• Performance & memory improvements by improving algorithms based on usage profiles.
• Improve usability of the tool by better reporting and query mechanism.
• Implemented clock noise failure detection avoiding chip failures.
• Tools/Technologies: C, C++, Linux, Purify, Profiler, Coverity, TCL, API

Aug 1998 – May 2001 · 2 yrs 9 mos

• Developed key components of Static Timing Analyzer for new FPGA Architectures.
• Implemented complete delay calculation engine with RC matrix AWE with high accuracy and integrated to STA & timing driven routing.
• Built a native 2-D matrix/tensor package in C++ with for stable numerical operations. And used for distributed RC modeling. Implemented a fast parasitics extraction from route shape and integrated to delay calc engine.
• Developed a fast simplified model from distributed parasitics & device data for timing driven placement.
• Timing database & design database and STA algorithm improvements and usability.
• Tools/Technologies : C++, flex/bison, config, OOP, Windows, matrix/tensor, linear algebra