Vaishnav NK — Software Engineer
Currently Working on Synthesis, STA and Physical Design of an SOC. I have a good understanding of ASIC and Memory Design with a couple of quality Projects in RTL_2_GDS, SRAM memory, RISC processor with the 5-stage pipeline, Design of an IP for the DNNLS, MMSE, and LS Algorithms on Vivado HLS and benchmark with the reference on SDK, and Hardware-software co-design using Zynq-SOC.
Stackforce AI infers this person is a VLSI design engineer with expertise in SOC development and physical design.
Location: Hyderabad, Telangana, India
Experience: 3 yrs 4 mos
Skills
- Sta
- Physical Design
- Synthesis
- Teaching
- Cadence Virtuoso
- Engineering
Career Highlights
- Expert in SOC synthesis and physical design.
- Strong background in ASIC and memory design.
- Experience with hardware-software co-design using Zynq-SOC.
Work Experience
Qualcomm
Senior Engineer (4 mos)
Samsung Semiconductor
Senior Engineer (2 yrs 6 mos)
Assistant Engineer (6 mos)
Indraprastha Institute of Information Technology, Delhi
Teaching Assistant (1 yr 5 mos)
Hyundai Motor India Engineering
Graduate Engineering Trainee (6 mos)
TSSPDCL
Intern (1 mo)
Bharat Heavy Electricals Limited
Internship Trainee (1 mo)
Education
Master of Technology - MTech at Indraprastha Institute of Information Technology, Delhi
Bachelor of Engineering - BE at MVSR Engineering College
