Anish Kumar Mondal

Software Engineer

Kolkata, West Bengal, India7 mos experience
Most Likely To Switch

Key Highlights

  • Expert in Digital VLSI Design with RTL and Verification focus.
  • Hands-on experience in DSP architectures and protocol-level designs.
  • Passionate about contributing to innovative silicon solutions.
Stackforce AI infers this person is a Semiconductor Design Engineer with expertise in VLSI and RTL Design.

Contact

Skills

Core Skills

Rtl DesignDesign VerificationAsic DesignRisc-v Architecture

Other Skills

Logic DesignSystemVerilogRISC-VApplication-Specific Integrated Circuits (ASIC)MATLABPerlCDCLintTimingProgrammingUniversal Verification Methodology (UVM)Very-Large-Scale Integration (VLSI)DesignRTL CodingVLSI CAD

About

I am driven by a deep interest in Digital VLSI Design, especially in the RTL and Design Verification domains. With hands-on experience in both DSP architectures and protocol-level designs, I aim to contribute to cutting-edge silicon solutions. 🔧 Project Highlights 🔹 16-bit DWT-based Image Compression: Designed and implemented for efficient image processing. 🔹 8-bit CAAM (Compressor-based Adaptive Approximate Multiplier): Targeted for low-power neural network applications. 📡 Technical Proficiency Protocols: SPI, UART, I2C, AMBA (APB, AHB, AXI) ISA & Architecture: Exposure to RISC-V microarchitecture EDA Tools: Simulation & synthesis environments Coursework: NPTEL-certified in VLSI Interconnects & Digital IC Design 💡 I also enjoy exploring Analog Circuit Design, adding depth to my understanding of full-chip design perspectives. 🔍 Actively seeking opportunities to grow in RTL/DV roles where I can contribute with both creativity and precision. Let’s connect if you're building the future of semiconductors — I’d love to be part of that journey!

Experience

7 mos
Total Experience
3 mos
Average Tenure
4 mos
Current Experience

Interex semiconductor

Design Engineer

Feb 2026Present · 4 mos · Bengaluru · On-site

Silicon interfaces

Assistant Engineer VLSI Design

Oct 2025Jan 2026 · 3 mos · Mumbai

  • worked on PCIe PHY layer ,CDR block

Scihub semiconductor solutions pvt ltd.

Summer Internship

Feb 2025Apr 2025 · 2 mos · India · Remote

RISC-VApplication-Specific Integrated Circuits (ASIC)ASIC DesignRISC-V Architecture

Vlsi for all pvt limited

Training Course

Jul 2024Feb 2026 · 1 yr 7 mos · India · Remote

  • Premium RTL Design and Verification course
Logic DesignSystemVerilogRTL DesignDesign Verification

Education

Indian Institute of Technology, Kharagpur

Master of Technology - MTech — Functional Material and Devices

Jun 2023May 2025

Indian Institute of Technology, Mandi

Master of Technology - MTech — Communication and Signal Processing

Aug 2022Dec 2022

Institute Of Engineering and Management

Bachelor of Technology - BTech — EE

Jan 2017Jan 2021

Harinavi D.V.A.S High School

Higher Secondary

Sarada Vidyapith

Stackforce found 100+ more professionals with Rtl Design & Design Verification

Explore similar profiles based on matching skills and experience