Salvatore Talluto

CEO

Milan, Lombardy, Italy36 yrs 7 mos experience
Most Likely To SwitchHighly Stable

Key Highlights

  • Over 20 years of experience in ASIC and digital design.
  • Expert in functional safety and test engineering.
  • Led multiple successful chip design projects.
Stackforce AI infers this person is a seasoned expert in semiconductor design and test engineering.

Contact

LinkedIn

Skills

Core Skills

Functional SafetyTest EngineeringTechnical SupportAsic DesignDigital Design

Other Skills

ATPGDFTMicroelectronicsASICTCLDiagnosisYield ManagementBISTMemory TestSimulationsLogic SynthesisStatic Timing AnalysisSemiconductorsIntegrated Circuit DesignRTL design

About

Principal Engineer Experience in : Manufacturing Test, Diagnosis, BIST, YMS, ATPG, DFT, Digital Design flow.

Experience

36 yrs 7 mos
Total Experience
8 yrs 7 mos
Average Tenure
14 yrs 2 mos
Current Experience

Synopsys

2 roles

Senior Solutions Architect

Promoted

Apr 2012 – Present · 14 yrs 2 mos

ATPGDFTMicroelectronicsDigital DesignASICTCL+23

Test Specialist Senior Staff Application Consultant

Oct 1998 – Mar 2012 · 13 yrs 5 mos

  • Test Specialist dedicated to ST Microelectronics, new technology deployment, worldwide coordination of technical activities for Test related support .
Test SpecialistTechnical SupportNew Technology DeploymentWorldwide CoordinationTest Engineering

Stmicroelectronics

Consultant

Jan 2001 – Jan 2007 · 6 yrs

Ericsson

Asic Designer

Oct 2000 – Feb 2001 · 4 mos

Alenia aeronautica

ASIC Designer

Oct 1989 – Oct 1998 · 9 yrs

  • ASIC Designer. Involved in the entire flow, front-end to back-end. Design, syntesis, validation, simulation, test, sign-off.
  • Design of more than 10 chip.
ASIC DesignDesign FlowValidationSimulationTestSign-off+1

Education

itis A. Einstein

Jan 1982 – Jan 1987

Stackforce found 100+ more professionals with Functional Safety & Test Engineering

Explore similar profiles based on matching skills and experience

Prisha Srivastava

Prisha Srivastava

Talent Acquisition Specialist

at NPCI BHIM

Mumbai, India6 yrs 11 mos exp
Talent AcquisitionRecruitmentTeam LeadershipCustomer ServiceConsulting
Lovleen Arora

Lovleen Arora

Principal Engineer, NAND SubSystem Device Engineering

at Western Digital

Bengaluru, India9 yrs exp
NAND Flash MemorySystem DesignProduct Development
Nishant Gupta

Nishant Gupta

Senior VLSI Design Engineer

at Sandisk

Bengaluru, India6 yrs 7 mos exp
FPGA IP Software DevelopmentFunctional VerificationDigital DesignsComputer Vision Systems DevelopmentFPGA Implementation
NY

Nanarao Yarragunta

Lead Software QA Engineer

at Molina Healthcare

Dallas, United States13 yrs 10 mos exp
Quality AssuranceAutomationTest ManagementTest Automation
Anoob Joseph

Anoob Joseph

Director

at Marvell Technology

Bengaluru, India12 yrs 7 mos exp
Embedded SystemsComputer Architecture
Nikhil Nair

Nikhil Nair

Director, Applications Engineering

at Synopsys Inc

Bengaluru, India18 yrs 8 mos exp
EDAVLSIPower Analysis
Levon Davtyan

Levon Davtyan

R&D Engineering, Manager

at Synopsys Inc

Yerevan, Armenia9 yrs 3 mos exp
Research and Development (R&D)Very-Large-Scale Integration (VLSI)
Tarun Gupta

Tarun Gupta

Associate Staff Engineer, DFT

at Samsung Semiconductor

Bengaluru, India7 yrs 8 mos exp
ASIC DFTDFT