Vishv Pratap Singh

Software Engineer

India2 yrs 5 mos experience

Highly Stable

Key Highlights

Expertise in SRAM Memory design and characterization.
Experience with advanced nodes in semiconductor technology.
Strong foundation in DRC and physical verification.

Stackforce AI infers this person is a Semiconductor Design Engineer with expertise in memory technologies.

Contact

Skills

Core Skills

Design Rule Checking (drc)

Other Skills

Layout Versus Schematic (LVS)Application-Specific Integrated Circuits (ASIC)EDAComputer-Aided Design (CAD)CalibreDRVCircuit TheoryPhysical VerificationDigital system designStatic Timing AnalysisDigital Electronics

About

Graduated from Thapar Institute of Engineering and technology in ECE. Currently involved in the SRAM Memory design & characterization for cutting edge advanced nodes (N2) for pseudo two port, 1r1rw and high density memories. Arm Regional Ambassador - Noida

Experience

2 yrs 5 mos

Total Experience

2 yrs 5 mos

Average Tenure

2 yrs 5 mos

Current Experience

Arm

2 roles

Design Engineer

Promoted

Apr 2025 – Present · 1 yr 2 mos

Graduate Design Engineer

Dec 2023 – Mar 2025 · 1 yr 3 mos

Stmicroelectronics

DRC / Runset Intern in PDK Team

Jan 2023 – Aug 2023 · 7 mos · Greater Noida

Developed and supported the DRC deck for different technologies like 28FDSOI, 40nm and 55nm.
Validated each rule in DRC deck through exhaustive QA cells (testcases) through regression test suite ARTE.
Worked on DFM property in the signoff deck for DRC-DRM misalignment.
Contributed in PDK tickets based on FCpad and density rules.
Generated 2D, 3D and cross sectional views of different layouts (DRAM,SRAM, RFMOM) using StarRC.
Developed and validated density rules,Latch up effects, Antenna effects, EMIR, ESD and VRC rules.
Good understanding of SVRF

Layout Versus Schematic (LVS)Design Rule Checking (DRC)