Sahdev Vegad

Software Engineer

Ahmedabad, Gujarat, India10 yrs experience

Highly Stable

Key Highlights

8+ years in Physical Design across multiple technology nodes.
Expertise in PnR from Netlist to GDSII Flow.
Hands-on experience with advanced semiconductor design tools.

Stackforce AI infers this person is a Semiconductor Design Engineer with extensive experience in Physical Design and ASIC development.

Contact

Skills

Other Skills

VHDLCC++MatlabPythonNI MultisimEagle PCBAltera QuartusPowersimKeilArduinoAssembly LanguageVerilogShell ScriptingTcl-Tk

About

8+ years of experience in Physical Design and worked on technology node from 90nm to 18A. Worked on PnR from Netlist to GDSII Flow.

Experience

10 yrs

Total Experience

2 yrs 9 mos

Average Tenure

1 yr 8 mos

Current Experience

Broadcom

R&D IC Desing Engineer

Oct 2024 – Present · 1 yr 8 mos · Bengaluru, Karnataka, India · On-site

Silicon & beyond (is now a part of synopsys)

5 roles

R & D Staff Engineer

Feb 2024 – Oct 2024 · 8 mos

R & D Engineer Sr II

Dec 2023 – Feb 2024 · 2 mos

R & D Engineer Sr I

Feb 2022 – Dec 2023 · 1 yr 10 mos

Asic Physical Design, Engr, Sr 1

Jun 2021 – Feb 2022 · 8 mos

Physical Design Engineer II

Apr 2019 – Jun 2021 · 2 yrs 2 mos

Einfochips (an arrow company)

Physical Design Engineer

Sep 2016 – Feb 2019 · 2 yrs 5 mos · Gujarat, India

Working on multiple projects as PD Engineer which includes responsibilities of IO and Core blocks from Netlist to GDSII Flow on 16nm node.

Eitra - einfochips training & research academy ltd

Trainee

Jan 2016 – Aug 2016 · 7 mos · Ahmedabad Area, India

Worked on Chiptop and JDSIIP4A blocks during my training at eITRA.
Tools used : ICC & PTSI

Education

Nirma University

Bachelor of Technology (B.Tech.) — Industrial Electronics Technology/Technician

Jan 2012 – Jan 2016

Nirma University

Bachelor of Technology (B.Tech.) — Electronics and Communication

Jan 2012 – Jan 2016

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