Prafful Choudhary

Software Engineer

Bangalore Urban, Karnataka, India3 yrs experience
Most Likely To Switch

Key Highlights

  • Over 3 years of experience in GPU and FPGA design.
  • Proven track record in functional verification.
  • Strong collaboration skills in diverse environments.
Stackforce AI infers this person is a Semiconductor Design Engineer with expertise in GPU and FPGA technologies.

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Skills

Core Skills

Functional DvGpu DesignFpga Design

Other Skills

SystemVerilogUVMRTL DesignPCIeEthernetIntel Quartus PrimeeAsicTCLJtagXilinx VivadoPerforceVerdiGDBSystem consoleVery-Large-Scale Integration (VLSI)

About

Innovative and passionate engineer with over 3+ years of experience in GPU (NoC) and FPGA (PCIe) design/DV. Proven track record of completing full project cycles while leveraging strong skills in SV/UVM to enhance system quality. Experienced in both startup and multinational corporate environments, with a strong focus on global team collaboration and efficiency. Intel: Working for Intel nxt-gen AI PC GPU (Xe3, Xe4) Responsible for the Functional DV (NoC) of all 3 lines of Graphics IP's from Intel ( Integrated Graphics, Discrete Graphics and High Performance Compute/Data-Centre GPU). Technical Skills: UVM, RTL Design, FPGAs ( Xilinx & Intel), Electronics Protocols: PCIe, Ethernet, AXI, Spi , I2C, AVMM(Intel specific), UART Tools : Xilinx Vivado, Intel Quartus , QuestaSim, GIT , Perforce,Synopsys Verdi ,Cadence Virtuoso, Cadence Genus,Innovus,Tempus,MATLAB,Code Blocks , Xilinx HLS, Google Colab Languages :System Verilog, Verilog, C, TCL Operating Systems: Linux, Windows HDL based tools : Vivado , Quartus

Experience

3 yrs
Total Experience
1 yr 6 mos
Average Tenure
2 yrs 8 mos
Current Experience

Intel corporation

2 roles

Sr. GPU Hardware Engineer

Promoted

Jul 2025Present · 11 mos · Bengaluru · On-site

  • Working for Intel nxt-gen AI PC GPU (Xe3, Xe4)Responsible for the Functional DV (NoC) of all 3 lines of Graphics IP's from Intel (Integrated Graphics, Discrete Graphics and High Performance Compute/Data-Centre GPU).
SystemVerilogUVMFunctional DVGPU Design

GPU Hardware Engineer

Oct 2023Jul 2025 · 1 yr 9 mos · Bengaluru · On-site

Drut technologies inc

FPGA Design Engineer 1

Jun 2023Oct 2023 · 4 mos · Nashua USA and Hyderabad, Telangana, India · On-site

  • Worked on PCIe Gen3/Gen4 RTL datapath development side. Experience in RTL Design for PCIe Switch and Subsytem Designing for optical datapath, Good Understanding of LTSSM
  • and different layers PMA, FEC, PCS, MAC
  • Experience in HW Validation/Verification by using Xilinx ip and inbuilt softwares iBert
RTL DesignFPGA Design

Altera

FPGA Design Verification Intern

Aug 2022Jun 2023 · 10 mos · Bengaluru

Education

International Institute of Information Technology Bangalore

Master of Technology - MTech — VLSI System

Jan 2021Jan 2023

Gautam Buddha University

Bachelor of Technology - BTech + MTech (iMtech) — Electronics & Communication Engineering + Artificial Intelligence and Robotics

Aug 2016May 2021

Gautam Buddha University

Master's degree — Artificial Intelligence

Feb 2020Feb 2021

Jawahar Navodaya Vidyalaya - JNV

SENIOR SECONDARY ( CLASS XII ) — Science

Apr 2015May 2016

Jawahar Navodaya Vidyalaya - JNV

SECONDARY ( CLASS X )

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