Saagar Lokare — Software Engineer
Graduate student expertise in RTL Design Verification and trained in working with Verification team in developing testbench architecture, test cases and functional verification of components.
Stackforce AI infers this person is a Digital Design Verification Engineer with expertise in RTL and UVM methodologies.
Location: Hyderabad, Telangana, India
Experience: 8 yrs
Career Highlights
- Expertise in RTL Design Verification.
- Developed testbench architecture and test cases.
- Strong background in digital electronics and verification methodologies.
Work Experience
Synopsys Inc
Staff Application Engineer (2 yrs 4 mos)
Senior Application Engineer (2 yrs 6 mos)
Applications Engineer II (2 yrs)
Applications Engineer I (2 yrs 10 mos)
Maven Silicon
Design and Verification Intern (8 mos)
Education
ME - Master of Engineering at Sinhgad College of Engineering
Bachelor of Engineering - BE at MGM's Jawaharlal Nehru Engineering College,Aurangabad
HSC at Dayanand Science College, Latur
SSC at Chh.Shivaji High School,Osmanabad