Anil Ingale — Product Engineer
As a DFT Engineer for intel - TechMahindra Cerium, I work with various and multiple clients, such as intel, NXP Semiconductor, Renesas Electronics, and Analog Inference, on projects of varying technology nodes having GPIS Application and Artificial Intelligence. I handle responsibilities such as ATPG pattern generation and debugging, timing and no timing GLS simulation w/wo SDF corners, coverage analysis and debug, scan integration and stitching, and working on pre-PnR and post-PnR patterns. I am proficient in different EDA tools, such as Mentor Tessent ATPG tools, Cadence Xcelium, Cadence Genus, Xilinx ISE and Xilinx Vivado, Modelsim and PSpice. I have a strong background in VLSI Design and Embedded System, having completed my MTech from premier institute Defense Institute of Advanced Technology (DIAT) in 2021. During my masters, I worked as a DFT project trainee and university project intern at NXP Semiconductor, where I gained hands-on experience in DFT fundamentals, understanding, and implementation. I learned about ASIC design flow, DFT basics, scan operations, DFT flow, Tessent Fastscan, test compression methodology, and wrote scripts and thesis on relevant topics. I also have a diploma and an engineer's degree in electronics and telecommunication engineering, and a skilled course in Embedded and VLSI. I have won multiple honors and certifications in microcontroller programming, state-level MSBTE project, signals and systems, and ASIC bootcamp. I am passionate about exploring and learning more in the DFT domain, and I have a good understanding of simulation, synthesis, STA, LEC, RTL and gates verification and simulation, HDL, and digital logic design. I am also familiar with SSA and TDF fault models, low fault coverage analysis, ATPG checks, DFT aware placement and routing, chain, serial, and parallel simulation, pattern mismatches debugging, scan chain insertion, pre-DFT and post-DFT DRCs, MBIST, and IEEE 1149.1 standard. I have strong analytical and problem-solving skills, good written and oral communication skills, and the curiosity to work on rare challenges. I am seeking DFT opportunities in the ASIC-VLSI domain, where I can apply my skills and knowledge, and contribute to the success of the organization and the industry. Happy to Respond! Reach out - 942-00-00-069 or anilingale1111@gmail.com
Stackforce AI infers this person is a Semiconductor Engineering specialist with a focus on DFT and ASIC design.
Location: Bengaluru, Karnataka, India
Experience: 3 yrs 9 mos
Skills
- Dft
- Eda
- Asic
Career Highlights
- Expert in DFT with hands-on experience in multiple semiconductor projects.
- Strong analytical skills with a focus on test coverage and debugging.
- Proficient in leading EDA tools for ASIC design and verification.
Work Experience
Tech Mahindra
Design Engineer (1 yr 7 mos)
Intel Corporation
Consultant (1 yr 7 mos)
HCL Technologies
DFT Design Engineer (2 yrs 2 mos)
NXP Semiconductors
Project Trainee / University Project INTERN (DFT) (10 mos)
Education
Master of Technology - MTech at Defence Institute of Advanced Technology (DIAT), DU, DRDO
Engineer’s Degree at Yeshwantrao Chavan College of Engineering - YCCE
skilled course at Indo-German Tool Room
Diploma at S.E.S. Polytechnic Solapur
High School at Vinayak hari paranjape vidya mandir, Mahad
2011 at Jawahar Navodaya Vidyalaya - JNV