Akhil Sai Reddy

Software Engineer

Bengaluru, Karnataka, India4 yrs experience

Key Highlights

  • Expert in SoC Boot and Power Validation.
  • Proficient in Python for automation and validation.
  • Experience with advanced lab instruments for debugging.
Stackforce AI infers this person is a Semiconductor Validation Engineer with expertise in SoC and performance validation.

Contact

Skills

Core Skills

Power Thermal And Performance ValidationSystem On A Chip (soc)Boot Flow ValidationSystem Marginal Validation

Other Skills

powerperformanceBoot validationCPythonNI-DAQTest AutomationProcess AutomationPnP ValidationLauterbachSilicon Bringupclock validation

About

System Validation Engineer in Intel working on SoC Boot Validation, Power and Thermal Validation

Experience

4 yrs
Total Experience
2 yrs 3 mos
Average Tenure
1 yr 9 mos
Current Experience

Nvidia

2 roles

Senior ASIC Engineer

Mar 2026Present · 3 mos

ASIC Engineer

Sep 2024Mar 2026 · 1 yr 6 mos

Intel corporation

2 roles

System Validation Engineer

Jun 2022Sep 2024 · 2 yrs 3 mos

  • 1. Boot Validation
  • Boot validation for Arm based SoC
  • Involved in SoC bring-up
  • Developed Boot validation plan & created test content in C & Python
  • SoC global IP Validation such as Clocks, Resets, PVT & Security
  • Execution of Boot tests on Palladium, FPGA platforms and Silicon
  • Experience on handling lab instruments such as Debuggers, Oscilloscopes & Analyzers for debug activities
  • Experience in setting up of hardware boards, PMIC programming
  • Measurements of boot timings & IO Characterizations
  • 2. Power and Performance Validation
  • Automated end to end PnP framework from Test Case generation to Final Report generation
  • Performed Robustness Validation of all IPs in a SoC across silicon skews & thermal
  • Figured out optimal calibration value of thermal sensor to keep SoC thermal readings under +/- 2 degC tolerance
  • Captured Power values of SoC in various scenarios using NI-DAQ across silicon skews and thermal
  • Performed System Marginal Validation of DDR across silicon skews & thermal
  • Developed and thoroughly validated thermal sensor (PVT) across silicon skews
  • Performed thermal validation of silicon [-40degC to 125degC]
powerperformanceSystem Marginal ValidationPower Thermal and Performance ValidationSystem on a Chip (SoC)

System Validation Intern

Jun 2021May 2022 · 11 mos

  • Developed Boot validation plan & created test content in C & Python
  • Execution of Boot tests on Palladium, FPGA platforms and Silicon

Education

National Institute of Technology Warangal

Master of Technology - MTech — Electrical and Electronics Engineering

Jun 2020Jun 2022

Sri Venkateswara University

Bachelor of Technology - BTech — Electrical and Electronics Engineering

Jun 2015Jul 2019

Sri Venkateswara University

Bachelor of Technology - BTech — Electrical and Electronics Engineering

Jun 2015Jun 2019

Jawahar Navodaya Vidyalaya - JNV

SSC

Jun 2009Jun 2013

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