Shubham Upadhyay

Software Engineer

Noida, Uttar Pradesh, India7 yrs 5 mos experience

Most Likely To SwitchHighly Stable

Key Highlights

6 years of experience in Memory Design and Circuit Design.
Expertise in leakage power reduction techniques for CMOS circuits.
Strong programming skills in Python, Perl, and Shell scripting.

Stackforce AI infers this person is a Semiconductor Design Engineer with expertise in Memory and Circuit Design.

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Skills

Core Skills

Memory DesignCompiler DesignCircuit Design

Other Skills

PPA OptimizationFull Compiler DeliveryMargin DebugLevel Shifter DesignBitcell AnalysisSense Amp AnalysisLeakage CharacterizationMarginingCharacterizationDevice CharacterizationDigital Circuit DesignVery-Large-Scale Integration (VLSI)SemiconductorsSemiconductor IndustryShell Scripting

About

B. Tech in Electronics and Communication . Memory Design Engineer/SRAM Compiler Design Engineer ( 6 years Experience ) . Knows about Memory Designing , Margining and Characterization . Have Textbook Knowledge about Physical Design . Quantum Mechanics Enthusiast Knows Python , Perl , Shell scripting, TCL ( bash/csh) Researched about Techniques to reduce leakage powers in CMOS circuits . Researched about methods to make hardware efficient circuits [ by approximating it ] .

Experience

7 yrs 5 mos

Total Experience

3 yrs 8 mos

Average Tenure

3 yrs 10 mos

Current Experience

Synopsys inc

2 roles

Staff Engineer, RnD

Feb 2025 – Present · 1 yr 4 mos · Noida, Uttar Pradesh, India

Senior Engineer, RnD

Aug 2022 – Feb 2025 · 2 yrs 6 mos · Noida, Uttar Pradesh, India

Projects :
1. PPA Optimization ( 1 Port and 2 Port RF HPCKIT) 7nm
2. Full Compiler Delivery (Huali 28, TSMC 28 , UMC 22) SRAM Single Port , Dual Port

PPA OptimizationFull Compiler DeliveryMemory DesignCompiler Design

Exiger technologies

2 roles

Design Engineer

Jan 2019 – Aug 2022 · 3 yrs 7 mos

Circuit Design Trainee

Aug 2018 – Jan 2019 · 5 mos

1) Memory/STD Cell Design, Margining and Characterization
> Memory Design, Margining and Char
> Basics of Memory circuit operations and Leaf cell design
> Memory margin stimulus development
> Memory characterization stimulus development
2) Good Understanding of different arcs in the libs and characterization
> Setup/Hold: Delay Method/Bisection Method
> Cell Delay/ Retain Delay
> Power: Pin Power / Arc Power / Output Toggle Power
> Leakage Characterization
> Input Cap Characterization
3) NLDM vs CCS concepts
4) OCV concepts and usage in STA
5) Sense Amp Analysis
6) Bitcell Analysis

Memory DesignMarginingCharacterization

Arm

Memory Design Consultant

Jan 2019 – Aug 2022 · 3 yrs 7 mos · Noida, Uttar Pradesh, India

Circuit Design :
Two port Control circuit design . Circuit Check/Margin Debug and fix . Level Shifter Design and fix to improve circuit resistance to glitches .
Updated lot of design to make circuit robust specially worked deeply on write assist circuitry to fix write issues .
Also have done Bitcell Analysis , Sense Amp Analysis . Level Shifter Analysis .
ESPCV :
Cleaned ESPCV for various compilers by fixing design , adjusting delays/multiplier .
Circuit Check :
Wrote stimulis to run Circuit Check to identify DC paths .
Margining :
Read/Write/ihold/Race Margin Debug and fix . TC Results Analysis and Variation analysis to make design robust to variations .
Characterization :
Enabled liberty LVF/AOCV view . Wrote stimulus . Did MC sims .
Leakage characterization . Have fixed existing stimulus to solve issues in setup/hold/retain/delay/pulse .
Fixed Trend issues .