Ayush Sharma — Software Engineer

CGPA:- 9.5 >Expert in RTL coding and understanding the flow . > I am currently completed M.tech in signal processing from mnnit Allahabad. > Sound knowledge of digital design concepts. > Hands on Verilog HDL, system verilog, and C. > scripting language knowledge: TCL , pearl,shell,Python >Familiarity with Linux. > Hands on experience of EDA Playground and Cadence virtuoso. > Working experience on Xilinx ISE, Xilinx Vivado tool, and Xilinx SDK. >Developing MBIST IP for different memory techn from 0.13 um to 28nm. >Working on adding the safety feature test in MBIS Mbist IP which can test the memory safety circuits. Merging the different techno MBIST IP solution to a single IP solution. >Doing Front end validation of MBIST by running NCSIsimulation,SPYGLASS,SYNTHESIS,FORMALITY and TETRAMAX. >Added new approach to test the memory in which read and write happens in a single cycle. >Working on RTL Design and development of Memory DFT solutions. >Developing repair Solutions for In-House ST memories. >Developing and improving diagnosis methods in MBIST IP.Supporting customers.Improving IP as per the customers feedbacks and our internal enhancements.

Stackforce AI infers this person is a Digital Design Engineer with expertise in RTL coding and memory testing.

Location: Raebareli, Uttar Pradesh, India

Experience: 3 yrs 10 mos