Kumar Akshat — Software Engineer
Good understanding of Python and TCL scripting in unix environment. Hand-on experience backend flow – Floor planning, Place & Route,CTS, Timing Signoff and DCD analysis. Good understanding of concepts like timing margins, OCV, Graph and Path based analysis, multicycle paths, half cycle paths, time borrowing, setup and hold fixes. Experience with analysis of timing reports, deriving fixes and generating timing ECOs. Knowledge of CMOS fundamentals. Hand-on experience in EDA tools Innovus, Prime Time and Tempus Qualified GATE 2017, 2018, 2019, 2020.
Stackforce AI infers this person is a Physical Design Engineer with expertise in VLSI and EDA tools.
Location: Bengaluru, Karnataka, India
Experience: 4 yrs 8 mos
Skills
- Physical Design
- Timing Signoff
Career Highlights
- Strong expertise in Physical Design and Timing Signoff.
- Hands-on experience with EDA tools like Innovus and Prime Time.
- Qualified GATE for four consecutive years.
Work Experience
Qualcomm
Physical Design Engineer (2 yrs 4 mos)
Incise Infotech Private Limited
Physical Design Engineer-I (2 yrs 4 mos)
Education
Master of Technology - MTech at Bhabha University
Bachelor of Technology - BTech at Babasaheb Bhimrao Ambedkar University
12th at Sunbeam English School
10th at Sunbeam Academy, Samneghat
