SASIVARNAM J — Software Engineer
Stackforce AI infers this person is a Formal Verification Engineer with expertise in VLSI and digital design.
Location: Bengaluru, Karnataka, India
Experience: 1 yr 10 mos
Skills
- Formal Verification
Career Highlights
- Expert in Formal Verification methodologies.
- Strong foundation in Digital Electronics and Verilog.
- Proven internship experience in leading tech companies.
Work Experience
Synopsys Inc
ASIC Design Engineer (Formal Verification) (1 yr 10 mos)
Cadence Design Systems
Design Engineering Intern (Formal Verification) (9 mos)
RJ Semiconductor
Intern Verification Engineer (5 mos)
Education
Bachelor of Engineering - BE at Bannari Amman Institute of Technology
HSC at Sri Vijay Vidyalaya (Boys) Matric Hr Sec School, Dharmapuri
SSLC at St. Francis. De. Sales. Matric Hr Sec School,Alangayam
Matriculation at Brindhavan Matriculation School
