Amila Amarasinghe — Software Engineer
Experienced Validation/Verification Engineering, Senior Engineer with 2+ years of experience in automation testing, static verification, EDA tool support, and GenAI-driven lint methodologies. Proven expertise in System Verilog, Python, C++, TCL, RTL design, and advanced digital design methodologies. Recognized with multiple awards for performance excellence and consistently acknowledged by leadership for delivering high-quality technical solutions across multiple customer engagements including Apple,MediaTek,Intel, AMD, Samsung, and Renesas. Lead Validator and BMURT Owner for the VC SpyGlass Lint team, driving end-to-end validation of the Lint GenAI project (PV) spanning Lint Agent, Fix Advisor, Waiver Advisor, Anomaly Detection, Custom Bug Finding, Debug Layer, and Single Cockpit integration. Ensured optimal workflow efficiency, robustness, and quality standards across 14+ MCP implementations, incremental lint modes, and AI-powered fix recommendation engines. Skilled in developing efficient test plans, test cases, and automation workflows for complex GenAI features including on-the-fly lint checking, RTL slicing, replace-file flows, user preference DB management, and natural language debug interfaces. Strong communicator who collaborates effectively with cross-functional engineering teams, customers, and GenAI infrastructure stakeholders
Stackforce AI infers this person is a Validation/Verification Engineer with expertise in EDA and GenAI technologies.
Location: Colombo, Western Province, Sri Lanka
Experience: 8 yrs 4 mos
Skills
- Validation/verification Engineering
- Automation Testing
- Genai
- Validation
- Test Automation
- Radio Network Planning
- Optimization
Career Highlights
- Led validation for GenAI-driven lint methodologies.
- Recognized for performance excellence across major tech companies.
- Skilled in developing automation workflows for complex features.
Work Experience
Synopsys Inc
Validation/Verification Engineering, Sr Engineer (1 mo)
Validation/Verification Engineering, Engineer (2 yrs 1 mo)
Mobitel (Pvt) Ltd
Engineer-Radio Network Planning and Optimization-(Engineering and Operations) (1 yr 7 mos)
IEEE MTT-S Student Branch Chapter University Of Peradeniya
Webmaster (1 yr 10 mos)
SEDS Pera
Member (4 yrs 2 mos)
ZTE Corporation
Trainee Electrical and Electronic Engineer (3 mos)
Institute Of Engineers Sri Lanka
Member (7 yrs 5 mos)
IEEE
Member (6 yrs 2 mos)
Education
BSc (Hons) at University of Peradeniya
Cisco Certified Network Associate Course at Vibernets Academy
Machine Learning Course at Edxcope
Image Processing Course at Edxcope
Deep Learning Course at Edxcope