Rojan Karn

Software Engineer

San Francisco, California, United States2 yrs 1 mo experience

Key Highlights

Expert in Hardware Emulation and Functional Verification.
Strong background in Python automation and tooling.
Proven experience in pre-silicon verification for advanced SoC designs.

Stackforce AI infers this person is a Hardware Verification Engineer specializing in pre-silicon emulation and automation in the semiconductor industry.

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Skills

Core Skills

Hardware EmulationFunctional VerificationPython (programming Language)Hardware TestingDigital Circuit DesignVhdl

Other Skills

Palladium emulationHelium Hybrid platformsSystemC/TLM2.0 modelingPCIe/QEMU integrationemulation performance optimizationPython/TCL automationdistributed workloadsdebug flowsutilization reportingSLURM-integrated scheduling solutionsSystemVerilogSystem on a Chip (SoC)DebuggingCommunicationPCIe

Experience

2 yrs 1 mo

Total Experience

1 yr 11 mos

Average Tenure

2 mos

Current Experience

Nvidia

Senior Firmware Engineer, Pre-Silicon Emulation

Apr 2026 – Present · 2 mos · Santa Clara, CA

Hardware EmulationFunctional Verification

Cadence

2 roles

Lead Application Engineer

Dec 2025 – Apr 2026 · 4 mos · San Jose, CA · On-site

Worked on Palladium emulation and Helium Hybrid platforms, supporting hyperscaler SoC customers across hybrid HW/SW co-verification, SystemC/TLM2.0 modeling, PCIe/QEMU integration, and emulation performance optimization.
Built Python/TCL automation and infrastructure tooling for distributed workloads, debug flows, and utilization reporting, including SLURM-integrated scheduling solutions.

Palladium emulationHelium Hybrid platformsSystemC/TLM2.0 modelingPCIe/QEMU integrationemulation performance optimizationPython/TCL automation+6

Senior Application Engineer

May 2024 – Dec 2025 · 1 yr 7 mos · San Jose, CA · On-site

Hardware EmulationPython (Programming Language)SystemVerilogFunctional VerificationSystem on a Chip (SoC)

Synopsys inc

Hardware Verification Application Engineer Intern

May 2023 – Aug 2023 · 3 mos · Sunnyvale, CA · On-site

Worked on pre-silicon verification and emulation flows for CXL devices, including SystemVerilog RTL development, Linux/QEMU virtual platform bring-up, and HBM3 validation infrastructure.
Contributed to CXL IP enablement, protocol training, and scalable verification environments for customer integration and coverage expansion.

DebuggingCommunicationPCIeHardware EmulationVerilogScripting+13

Intel corporation

2 roles

Hardware Application Engineering Intern

May 2022 – Aug 2022 · 3 mos · San Jose, CA

Worked on Intel FPGA transceiver applications and hardware validation, including Ethernet/Direct PHY silicon bring-up, BER testing, JTAG debug, Tcl automation, and Python/PyQT tooling for customer support workflows.

Intel Quartus PrimeREST APIsVerilogDigital Circuit DesignScriptingHardware Testing+10

FPGA Technical Intern

May 2021 – Nov 2021 · 6 mos · San Jose, CA

Developed Python automation tooling, FPGA educational content, and analytics-driven web initiatives supporting Intel FPGA academic and marketing programs.

Intel Quartus PrimeData StructuresTeamworkVerilogDigital Circuit DesignPython (Programming Language)+7

Rensselaer polytechnic institute

Undergraduate Student Assistant

Jan 2021 – May 2021 · 4 mos · Troy, NY

UG-SA for ECSE 2610 (Computer Components & Operations)
Supporting FPGA/VHDL design debug, digital logic coursework, and Vivado-based lab instruction for 100+ students.

Digital Circuit DesignVHDLLogic DesignXilinx VivadoDigital LogicField-Programmable Gate Arrays (FPGA)+2

Transfinder

Client Services Intern

Jul 2020 – Sep 2020 · 2 mos · Schenectady, NY

Supported client-facing software troubleshooting and data management workflows through technical debugging, Microsoft Access database work, and collaboration with senior support engineers.