Sridhar Rangarajan

CTO

Bengaluru, Karnataka, India26 yrs 3 mos experience
Most Likely To SwitchHighly Stable

Key Highlights

  • Expert in architecting EDA solutions using Machine Learning.
  • Led teams in developing next-gen physical design tools.
  • Specialized in Logic Synthesis and Physical Optimization.
Stackforce AI infers this person is a leader in EDA and Machine Learning for semiconductor design.

Contact

Skills

Core Skills

Deep LearningDesign ConvergenceLogic SynthesisPhysical DesignRouting

Other Skills

Automatic Design Convergence SystemNumerical OptimizationDiscrete OptimizationPhysical PlacementCircuit Level Power OptimizationRouting Solution DesignZroute DevelopmentRouting Solution DevelopmentClock ToolsPower ToolsEDAAlgorithmsCADTiming ClosureRTL design

About

I am passionate about architecting and developing solutions for EDA 2.0 using Big Data and Machine Learning technologies Architect and develop both descriptive and prescriptive analytics with deep learning algorithms. Project lead in CAD, architecting and driving the next generation physical design tools and solutions for next generation microprocessor design. Main area of focus is in Logic Synthesis, Placement, Routing and Physical Optimization. Involved in DFM, DFY solutions. Specialties: Expertise in Machine Learning, Deep Learning, GNN, Reinforcement Learning, Spark, TitanDB, CAD algorithms and tools in Placement, routing, physical optimization clock, power, yield for IC design.

Experience

26 yrs 3 mos
Total Experience
4 yrs 4 mos
Average Tenure
5 yrs
Current Experience

Cadence design systems

Group Director - Engineering

Jun 2021Present · 5 yrs · Bangalore

Mentor graphics

Director Of Engineering

Dec 2017Jun 2021 · 3 yrs 6 mos

  • Drive the strategy and direction for AL in Place & Route solution
  • Learning based Automatic Design Convergence System using recipes to effectively converge on a design with minimal user intervention
  • Leading teams of Technical Leads, Product Engineers and software developers focusing on applications of Deep Learning, numerical and discrete optimization algorithms to develop products and solutions for digital design implementation.
Deep LearningAutomatic Design Convergence SystemDesign ConvergenceNumerical OptimizationDiscrete Optimization

Ibm

2 roles

STSM

Jun 2016Dec 2017 · 1 yr 6 mos

Senior R&D Engineer

Aug 2008May 2016 · 7 yrs 9 mos

  • Technical leader for the tools and methodology development team in IBM. Leads and drives solutions like Logic synthesis, physical placement and circuit level power optimization. These tools in addition to optimizing our high performance processor designs, enable quicker Turn Around Times and allow for incremental changes to the designs without impacting the schedules.
Logic SynthesisPhysical PlacementCircuit Level Power OptimizationPhysical Design

Synopsys inc.

R&D Routing Engineer

Aug 2006Aug 2008 · 2 yrs

  • Involved in the design and development of zroute, routing solution.
Routing Solution DesignZroute DevelopmentRouting

Sun microsystems inc.

Staff Engineer

Jan 2003Jul 2006 · 3 yrs 6 mos

  • Lead a team of people in developing the next generation routing solution for microprocesor design. Involved closely with design teams inm optimizing the TAT for phsyical design. Developed clock and power tools for niagara processors and Sun methodology.
Routing Solution DevelopmentClock ToolsPower ToolsRouting

Monterey design systems inc.

Staff Engineer

Jan 2000Jan 2003 · 3 yrs

Education

University of California, Berkeley, Haas School of Business

Executive MBA

Aug 2025Present

Santa Clara University

MS — Computer Engineering

May 2002Jun 2004

University of California, Berkeley, Haas School of Business

Executive Presence Program

Jun 2025Present

Birla Institute of Technology and Science, Pilani

BE Computer Science — Computer Science

Birla Institute of Technology and Science, Pilani

MS — Economics

Sri Ahobila mutt oriental school

High School

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