Amal Padmanabhan

Software Engineer

Kerala, India5 yrs 10 mos experience

Highly Stable

Key Highlights

Experienced in formal verification and RTL coding.
Proficient in multiple programming languages including Python and Java.
Strong background in VLSI from a reputed institution.

Stackforce AI infers this person is a VLSI Engineer with expertise in formal verification and design tools.

Contact

Skills

Core Skills

Synopsys FormalityFormal Verification

Other Skills

Synopsys Design CompilerRTL CodingParasitic ExtractionPython (Programming Language)Shell ScriptingMatlabVerilogJavaPL/SQLHTMLLinuxXilinx VivadokerasTensorFlowCadence Virtuoso

About

An enthusiastic individual who loves to work in a challenging environment.

Experience

5 yrs 10 mos

Total Experience

5 yrs 10 mos

Average Tenure

5 yrs 10 mos

Current Experience

Synopsys inc

4 roles

Staff Application Engineer

Feb 2024 – Present · 2 yrs 4 mos

Synopsys FormalitySynopsys Design CompilerRTL CodingFormal VerificationParasitic ExtractionPython (Programming Language)+12

Senior Application Engineer

Promoted

Feb 2023 – Feb 2024 · 1 yr

Application Engineer II

Aug 2020 – Feb 2023 · 2 yrs 6 mos

Intern

Jun 2019 – Jul 2020 · 1 yr 1 mo

Education

National Institute of Technology Agartala

Master of Technology - MTech — VLSI

Jan 2018 – Jan 2020

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