Gaurang Agrawal

DevOps Engineer

Noida, Uttar Pradesh, India2 yrs experience
Highly StableAI Enabled

Key Highlights

  • Expertise in Low-power Design and Verification.
  • Proficient in Formal and Assertion Based Verification.
  • Strong foundation in Electrical and Electronics Engineering.
Stackforce AI infers this person is a Low Power Verification Engineer with expertise in VLSI and EDA.

Contact

LinkedIn

Skills

Core Skills

Low-power DesignUnified Power Format (upf)Design FlowUvmFormal VerificationAssertion Based Verification

Other Skills

Static VerificationComputer-Aided Design (CAD)Hardware DesignFunctional VerificationRoot CauseScriptingObject-Oriented Programming (OOP)DebuggingDigital Circuit DesignApplication-Specific Integrated Circuits (ASIC)EDATCLShell ScriptingSystemVerilogVerilog

Experience

2 yrs
Total Experience
2 yrs
Average Tenure
2 yrs
Current Experience

Synopsys inc

2 roles

Verification Validation Engineer

Jun 2024 – Present · 2 yrs · Noida · On-site

Unified Power Format (UPF)Low-power Design

Internship ( Foraml Verification Engineer)

Nov 2022 – Nov 2023 · 1 yr · Bengaluru · On-site

Assertion Based VerificationFormal Verification

Vlsi expert private limited

Trainee

Nov 2023 – Mar 2024 · 4 mos · Noida, Uttar Pradesh, India · Hybrid

Design FlowUVM

Education

GLA University

Bachelor of Technology - BTech — Electrical and Electronics Engineering

Jan 2019 – Jan 2023

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