May 2026 – Present · 1 mo · Ho Chi Minh City, Vietnam

May 2024 – Present · 2 yrs 1 mo · Ho Chi Minh City, Vietnam

• Application Engineer – FLEX Team Experienced in EDA tools with a focus on:
• Library Characterization: Supporting characterization workflows using SiliconSmart/PrimeLib across multiple technology nodes, covering diverse cell types including standard cells, macros, and I/O,...
• Static Timing Analysis (STA): Proficient in timing verification and analysis using PrimeTime to ensure design accuracy and performance.
• Symbolic Verification: Skilled in using Synopsys ESP to perform equivalence checking between SPICE netlists and Verilog models, ensuring functional consistency across design representations

Sep 2023 – Apr 2024 · 7 mos · Ho Chi Minh City, Vietnam

Jun 2023 – Sep 2023 · 3 mos · Ho Chi Minh City, Vietnam

• A 3-month short course organized by Synopsys, covering the full ASIC design process from the basics of Linux/Cshell, Awk, TCL..., then RTL Synthesis, formality checking, circuit insertion DFT and Physical Design such as Block Level Implementation, Top Level Implementation, DRC, PDV, LVS testing, etc. Throughout the course, practice directly with Synopsys EDA tools: DCNXT, DC, Formality, PrimeTime, ICCII, Fusion Compiler,... and practice on the ORCA design (TSMC 32nm), Bitcoin design, and work group with creating a lab tutorial. After the course, I achieved the Synopsys Certified Digital Associate (SCDA) certification and was in the best group in the course.