Venkateswara Rao Challa — CEO
A Physical Design Methodology Application Engineer with 3+ years of experience (including a 1-year internship) at Synopsys, specializing in advanced-node (Intel 18A, TSMC N3P) design convergence for Intel’s core execution teams. Demonstrated strong expertise in developing PnR flows, enabling AI-driven EDA (DSO.ai, Phoenix.ai, MLMP), and PPA closure across projects. Have delivered measurable impact through 20–40% turnaround time (TAT) reduction, achieving 90% correlation between Fusion Compiler and PrimeTime, and driving >50% compute efficiency gains with cross-block learning (CBL). My work has enabled 3–10% power improvements across complex blocks with millions of instances running at multi-GHz frequencies. Beyond project execution, I have been recognized with the Rookie Award (Q4 2024) for enabling innovative flows using DSO.ai. I am also an inventor with 6 published patents in healthcare, automation, and embedded systems, along with national recognition through the CII MILCA Platinum Award (2022) for innovation. Passionate about bridging EDA, AI, and silicon implementation, I thrive at the intersection of technology and innovation, collaborating with R&D, product experts, and customers to accelerate convergence and deliver PPA benefits. Always open to learning, sharing, and driving next-generation semiconductor design solutions. During my bachelors, Former Student Head of the "Robotics and Intelligent System Community," a Tier-7 Technical Student Organization. Inculcating the motto of "Learn-Implement-Share," we embarked on thrilling competitions and fostered a growth environment. Let's connect and explore possibilities together! Open to learn...
Stackforce AI infers this person is a Semiconductor Manufacturing expert with a focus on AI-driven EDA solutions.
Location: Bengaluru, Karnataka, India
Experience: 5 yrs 11 mos
Skills
- Ai Driven Eda
- Design Closure
- Physical Design
Career Highlights
- Achieved 20-40% turnaround time reduction.
- Recognized with Rookie Award for innovative AI-driven flows.
- Inventor with 6 published patents in diverse fields.
Work Experience
Synopsys Inc
Application Engineer, Physical Design (2 yrs 9 mos)
Technical Intern, Engineering (1 yr)
RISC - Robotics and Intelligent System Community (LPU)
Chief Executive Officer - Student Head (11 mos)
Dy. Management Head (1 yr 7 mos)
Member and Co-ordinator (1 yr 5 mos)
DROIDVERSE Labs Pvt Ltd
Student Intern (1 mo)
Techvanto Academy
Summer Research Intern (1 mo)
Education
Bachelor's degree at Lovely Professional University
11th - 12th Class at Sri Bhaskar Bhavan, Sri Chaitanya, Vijayawada
10th Class at Sri Chaitanya Techno School, Vijayawada.