Nov 2025 – Present · 7 mos

Aug 2022 – Nov 2023 · 1 yr 3 mos · City Of Bristol, England, United Kingdom · On-site

• Responsible for the compact models for different RF and Power devices used by the designers.
• Interface between the designers and Fabs concerning device compact models.
• Evaluation of Fab PDK models with in-house characterization and development of new/improved models.
• Working with varied technologies including CMOS (multiple nodes including advanced FinFET nodes), GaAs pHEMTs, SiGe HBTs, Power devices etc.

Apr 2021 – Jul 2022 · 1 yr 3 mos

• Modeling lead for an in-house 130 nm BCD technology with an user community of more than 200 designers across the globe.
• Spot award in 2021.

Jun 2019 – Apr 2021 · 1 yr 10 mos

• Responsible for development and maintaining the compact models for power IC technology devices.
• Compact modeling of BCD devices.

Apr 2016 – Apr 2019 · 3 yrs · Grenoble Area, France

• Compact modelling of 28 nm FD-SOI MOSFETs.
• Device level global and local variability analysis.

Aug 2015 – Sep 2015 · 1 mo · Lausanne, Vaud, Switzerland

• Working at LSM, EPFL
• TCAD simulation of SOI and Bulk MOSFETs
• Self heating effects.

Feb 2015 – Jul 2015 · 5 mos · Lausanne, Vaud, Switzerland

• Working at LSM, EPFL
• TCAD simulation of SOI and Bulk MOSFETs
• Self heating effects.

Jul 2014 – Jan 2015 · 6 mos · Switzerland

• TCAD simulations of Power electronic devices.
• Evaluation of multiple TCAD softwares for power device applications.

Feb 2014 – Jun 2014 · 4 mos · Lausanne, Vaud, Switzerland

• Worked at LANES, EPFL
• Fabrication and characterization of heterostructure pn junctions using 2D Transition metal Dichalcogens

May 2012 – Jul 2012 · 2 mos · India

• Synthesis and Characterisation of Magnetic, Plasmonic Nanoparticles.

May 2011 – Jul 2011 · 2 mos · Mumbai Metropolitan Region

• Simulation of Silicon wire solar cells.