Aditya Singh — Software Engineer
•4+ years of experience in PCIe IP Verification using System Verilog and UVM. •Defining test plan, reviews with other functional teams. Implementing testbench, Assertions, and verifying the design. •Thankyou for seeing my profile Interested in Design verification of PCIE, CXL
Stackforce AI infers this person is a Verification Engineer specializing in PCIe and CXL technologies.
Location: Bengaluru, Karnataka, India
Experience: 5 yrs 8 mos
Skills
- Verification
- Universal Verification Methodology (uvm)
- Pcie
- Functional Verification
- Systemverilog
Career Highlights
- Over 4 years of PCIe IP Verification experience.
- Expertise in System Verilog and UVM methodologies.
- Strong background in defining and implementing test plans.
Work Experience
Synopsys Inc
Staff Verification Engineer (1 mo)
Senior Design Verification Engineer (2 yrs 7 mos)
Intel Corporation
Pre Silicon Verification Engineer (1 yr 3 mos)
Indian Institute of Technology, Roorkee
Teaching Assistant (1 yr 10 mos)
Education
Master of Technology - MTech at Indian Institute of Technology, Roorkee
