Pavithra Vinayagamoorthy

Software Engineer

Bengaluru, Karnataka, India4 yrs 8 mos experience
Highly Stable

Key Highlights

  • Expert in Analog Layout and IC Design.
  • Proficient in Cadence Virtuoso for layout design.
  • Strong background in VLSI and analog semiconductors.
Stackforce AI infers this person is a skilled Analog Layout Engineer in the semiconductor industry.

Contact

LinkedIn

Skills

Core Skills

Analog LayoutIc Layout

Other Skills

Layout DesignCadence VirtuosoParagonxParasitic ExtractionTsmcPhase-Locked Loop (PLL)Design Rule Checking (DRC)Very-Large-Scale Integration (VLSI)Layout Versus Schematic (LVS)Analog Semiconductors

Experience

4 yrs 8 mos
Total Experience
2 yrs
Average Tenure
8 mos
Current Experience

Smartsoc solutions pvt ltd

Senior Analog Layout Engineer

Oct 2025 – Present · 8 mos · Bengaluru, Karnataka, India · On-site

  • Working for Qualcomm
Layout DesignCadence VirtuosoAnalog LayoutIC Layout

Excelmax technologies

Senior Analog Layout Engineer

Oct 2024 – Oct 2025 · 1 yr · Bengaluru, Karnataka, India · On-site

  • Working for Qualcomm
Analog LayoutLayout DesignIC Layout

Hcltech

2 roles

Senior Software Engineer

Promoted

Oct 2022 – Nov 2024 · 2 yrs 1 mo · Bengaluru, Karnataka, India · Hybrid

Software Engineer

Sep 2021 – Sep 2022 · 1 yr · Bengaluru, Karnataka, India · Hybrid

Education

Government College of Technology, Coimbatore

Bachelor of Engineering — Electronics and instrumentation

Jan 2017 – Jan 2021

Government Girls Higher Secondary School,Chidambaram

Grade 12 — Biomathematics

Jan 2016 – Jan 2017

Government Girls Higher Secondary School,chidambaram

Grade 10 — Samacheer

Jan 2014 – Jan 2015

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