Jihong Kim

Software Engineer

Gwangmyeong-si, Gyeonggi, South Korea9 yrs 2 mos experience

Most Likely To SwitchHighly Stable

Key Highlights

9+ years of expertise in SerDes PHY and PCIe technologies.
Proven track record in post-silicon validation and compliance testing.
Strong technical support experience for high-speed interfaces.

Stackforce AI infers this person is a Semiconductor Validation Engineer with a focus on high-speed SerDes and PCIe technologies.

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Skills

Core Skills

Serdes Phy Application EngineeringTechnical SupportSerdes Ip Application EngineeringPcie / Usb Post-silicon ValidationElectrical CharacterizationSilicon Validation

Other Skills

Application-Specific Integrated Circuits (ASIC)SerDesTest Environment SetupEthernetSignal integrity analysisFirmware diagnosisAutomated compliance testingElectronic TroubleshootingUSBCPython (Programming Language)Physical LayerHW DesignC#Test Automation

About

High-speed SerDes PHY expert with 9+ years spanning PCIe/SerDes PHYs post-silicon validation and SerDes IP application engineering. · SerDes PHY Application Engineering (2023~) - Technical support for PCIe, Ethernet and SerDes PHY - Customer silicon bring-up and PHY integration guidance - Electrical characterization, SerDes PHY optimization for compliance testing · SerDes IP Application Engineering (2022) - Technical support for PCIe, USB, Ethernet and UCIe - IP integration support and customer technical consultation · PCIe / USB Post-Silicon Validation (2017~2022) - Mobile AP & SSD Controller (PCIe Gen4, USB3.1) - Exynos S5E9630/9820/9830/9840 silicon bring-up and validation - Samsung SSD 980 Pro Controller (PCIe Gen4) - Electrical characterization, protocol debug (SoC-to-IP), firmware diagnosis (C/C++) - Signal integrity analysis, link training debug, PHY compliance testing (PCI-SIG / USB-IF) - Automated compliance test platform development (C#, Python) - Test plan design based on PCIe/USB specification documents