Jatin Goyal

CTO

Noida, Uttar Pradesh, India6 yrs 8 mos experience
AI EnabledAI ML Practitioner

Key Highlights

  • 7+ years of experience in EDA tools and IO design.
  • Expertise in high-speed analog and mixed signal systems.
  • Strong background in technical consultation and customer requirements.
Stackforce AI infers this person is a Semiconductor and Electronics Design Engineer with extensive experience in IO design and circuit validation.

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Skills

Core Skills

Io DesignAnalog Circuit DesignTechnical ConsultationCustomer RequirementsCircuit Design

Other Skills

CommunicationDebuggingArtificial Intelligence (AI)Design optimization through AIERP SoftwareMicrosoft WordMicrosoft ExcelMicrosoft PowerPointMs officeSharePointSchematic designPrinted Circuit Board (PCB) DesignCustom compilerBbsimAltium

About

-> MTech. in Electronics and communication branch from NIT Delhi (7.6 CGPA) -> MBA in Business Management from Narshee Monjee Institute (NMIMS), Bombay ->Total 7+ years corporate experience of using EDA tools, currently working in STMicroelectronics in IO Design team for designing of different IO blocks. -> 3 years of work exp in synopsys (June 2022 to April 2025) in GPIO team as a senior analog design engineer worked on different projects consisting several foundries like GF, INTEL, SAMSUNG and TSMC with hands on IO DC/AC simulations using custom compiler and BBSIM, CAD vs Silicon, Understanding of different GPIO Blocks, their Designs and transistor level functionality ( Transmitter-> Driver & Predriver & Low to high level shifter, Receiver-> Schmitt trigger & High to low level shifter, Weak pull up/Down, ESD, Fail safe and fail tolerant IO, I2C, I3C, LVDS , EMMC PHY databooks, creating IOs test plan and silicon reports with owning the Complete IO testing coverage, LAB debug etc. ->2.8 years of work experience (Jan. 2016 to April 2018 including 6 months of training period in VVDN Tech. Pvt. Ltd & Jan 2022 to June 2022 in Motherson Innovations) in designing high speed analog and mixed signal systems and embedded product testing / debugging for industrial and commercial applications. -> Hand on experience of using EDA Tools like synopsys custom compiler, bbsim , altium, cadence orcad, allegro etc. -> Hands on experience in IO Compatibilty & Stress Analysis -> Hands on experience in using industry level protocols and technologies such as microprocessor/MCU, Flash, DDR3, UART, SPI, I2C, BLE, GPS, LTE, etc.

Experience

6 yrs 8 mos
Total Experience
1 yr 9 mos
Average Tenure
1 yr 2 mos
Current Experience

Stmicroelectronics

Technical Leader

Apr 2025Present · 1 yr 2 mos · Greater noida · On-site

  • Currently working on IO Circuit designing for tech nodes 45nm & 18nm combining GPIO, I2C/I3C and other IPs.
Analog Circuit DesignIO Design

Synopsys inc

Sr Analog Design Engineer

Jun 2022Apr 2025 · 2 yrs 10 mos · Noida, Uttar Pradesh, India

  • Worked on GPIOs , IO Simulations, Designing and validation activities for different tech nodes 16nm,18nm, 22nm, 7nm & 2nm.
Technical ConsultationCommunication

Motherson innovations

Hardware Design Engineer

Jan 2022Jun 2022 · 5 mos · Noida, Uttar Pradesh, India

  • Mainly worked on Circuit Designing, IO Compatibilty, Stress Analysis , BOM Optimization, Board bring up & validation activities
Customer Requirements

Goyal classes

Owner

May 2018Mar 2020 · 1 yr 10 mos · Mathura, Uttar Pradesh, India · On-site

  • Cracked GATE in EC during this tenure with working as a PCM faculty @ Goyal Classes. It was our own startup coaching institution

Vvdn technologies

Hardware Mixed Signal Circuit Design Engineer

Jan 2016Apr 2018 · 2 yrs 3 mos · Gurugram, Haryana, India

  • Designing high speed analog and mixed signal systems and embedded product testing / debugging for industrial and commercial applications.
  • Hands on experience in using industry level protocols and technologies such as microprocessor/MCU, Flash, DDR3, UART, SPI, I2C, BLE, GPS, LTE, etc.
  • Hands on experience of EDA tools: OrCAD (schematic drafting), Allegro (Layout review) and EDRAW for drawing purpose.
  • Hands on experience on STM32 micro controllers, sensors, camera.
  • Board Bring up and Design Validation Testing (DVT Report) of various Hardware Interfaces.
  • Test equipments : Oscilloscope, Multi-meter, Rheostat, Network Analyzer, Power Supply, Thermal Chamber etc.
  • Schematic drafting, layout review, documentation, Board bring up , debugging, interface validation and ERP management.
Customer RequirementsCircuit Design

Education

National Institute of Technology Delhi

Master of Technology - MTech — Electronics and communication

Jan 2020Jan 2022

SVKM's Narsee Monjee Institute of Management Studies (NMIMS)

Master of Business Administration - MBA

Apr 2022Dec 2024

GLA University

Bachelor of Technology - BTech — Electronics and Communications Engineering

Jul 2012May 2016

Kishori Raman Inter College, Mathura (Uttar Pradesh)

12th Standard — PCM

Jul 2009May 2011

Clancy Inter College, Mathura ( Uttar Pradesh)

High School — Science

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