MUKESH YADAV

Software Engineer

Azamgarh, Uttar Pradesh, India4 yrs experience
Highly Stable

Key Highlights

  • Improved power prediction accuracy by 40%
  • Developed interactive GUI views for power debugging
  • Designed TCL-based reporting frameworks for validation
Stackforce AI infers this person is a Senior R&D Engineer in EDA tools specializing in RTL power analysis and GUI development.

Contact

Skills

Core Skills

Rtl Power AnalysisVerilog

Other Skills

Clock gatingTransaction Control Language(TCL)Prime PowerDebuggingPower EstimationC++AlgorithmData structureCOperating SystemsHTML5Cascading Style Sheets (CSS)JavaScriptMySQLDBMS

About

Senior R&D Engineer with 4+ years of experience in EDA tool development at Synopsys, specializing in RTL power analysis, GUI development, and power-debug workflows. I have contributed to core development of SpyGlass Power and PrimePower RTL, focusing on improving power estimation accuracy, GUI-based debugging, and customer-facing features. Key contributions include: • Improved internal power prediction accuracy by 40% by fixing Liberty power-model calculations. • Developed multiple interactive GUI views in C++/Qt enabling faster RTL power debugging. • Designed TCL-based reporting frameworks for sign-off validation and debug workflows. • Collaborated directly with customer teams to resolve real-design power issues. Technical Focus: EDA Tools | RTL Power Analysis | C++ | Qt GUI | TCL | Verilog | Liberty | VCS | Verdi | Linux

Experience

4 yrs
Total Experience
4 yrs
Average Tenure
4 yrs
Current Experience

Synopsys inc

3 roles

R&D Sr Engineer

Dec 2024Present · 1 yr 6 mos

Research And Development Engineer

Jun 2022Present · 4 yrs

Clock gatingVerilogRTL Power Analysis

Intern

Jan 2022Jun 2022 · 5 mos

Education

Indian Institute of Information Technology Bhagalpur

Bachelor of Technology - BTech — Computer Science

Jan 2018Jan 2022

Shibli National College Azamgarh

Intermediate

Jul 2015May 2017

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